We need ata_id_has_lba48() in another C file, so move
the ATA_ID_* stuff to include/ata_drive.h like in the Linux
Kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In devinfo for the card also print:
- capabilities for host and card
- current bus width
- current clock
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use MMC_CAP_ names instead of MMC_MODE_. This makes it more
clear that these are capabilities of host/card and do not refer
to the current mode. These are in line with the Linux Kernel
except for MMC_CAP_MMC_HIGHSPEED_52MHZ which could be fixed
later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We often encounter the situation where slow devices should not be
probed during startup since probing is slow and maybe unnecessary
for unused devices. With MMC we have the 'probe' device parameter,
for ata we have the same, for USB we have the 'usb' command. Overall
this is not very consistent.
With MMC there is the additional problem that the probe parameter
is attached to the logical device when we often have the information
which physical device we want to probe.
This patch adds a 'detect' callback for devices and adds a command
to detect devices and to list the devices which are actually detecable.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This driver should work with some Atheros WiSoCs:
- ar2312, ar2313
- ar2315, ar2316 ...
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It's confusing to set the status of a node to disabled and afterwards
it's invisible. Similarly it's confusing to be able to enable invisible
nodes.
Also print disabled nodes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We already have the possibility to register a mci with a certain
filename to get persistent names. However, the device needed to
find the probe parameter still has the name 'mcix'. This patch
changes this by registering the mci device with the same name
as the filename.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since the info is device specific and not driver specific, attach
the callback to the device. This makes it possible to have a info
callback for a device which does not have a driver attached.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some MMC cards support boot partitions. These are special regions
on the MMC card intended to put a bootloader on.
This patch adds support for these partitions, they are accessible
as /dev/diskx.boot[0|1].
Additionally the partitions can be configured bootable using a
device parameter. This can be used to mark the user area or one
of the boot partitions as bootable.
Since this feature is mostly seen on eMMC cards it is made optional
to lower the size impact for boards which do not have eMMC.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This updates the i.MX esdhc divider settings to FSLs U-Boot.
Current timings work fine for SD cards, but not for eMMC.
Although the calculation is fine according to the datasheet and reading from
eMMC works, writing is broken. Atleast on i.MX53/tqma53.
With this patch the result is the same, but uses different divider values to
achieve it.
While at it, replace the udelay with a busy-loop.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This gives the SDHCI specific registers a common name and moves
them to a separate file for use by other SDHCI like drivers.
The SDHCI spec has some 16bit and 8bit registers. The i.MX accesses
these as 32bit registers. These register defines now are named after
the SDHCI registers they combine into one, for example:
SDHCI_HOST_CONTROL__POWER_CONTROL__BLOCK_GAP_CONTROL
is the 32bit version of the SDHCI registers HOST_CONTROL, POWER_CONTROL
and BLOCK_GAP_CONTROL.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If a device does not have bad blocks loop over the eraseblocks
in the driver instead of the core. This allows the mtd_dataflash
driver to erase blocks instead of pages to gain more speed during
erasing. Also the mtd_dataflash driver modifies the erase_info
struct which causes the outer loop in the core to never end.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Many cfi chips support 16 and 8 bit modes. Most important
difference is use of so called "Q15/A-1" pin. In 16bit mode this
pin is used for data IO. In 8bit mode, it is an address input
which add one more least significant bit (LSB). In this case
we should shift all adresses by one:
For example 0xaa << 1 = 0x154
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some parameters may wish to provide some information about their
meaning or possible values. Provide an info callback for parameters.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The fdt reserve map needs address/size values, not address/end values
like accidently done for generating the reserve entry for the dt.
Reported-by: Jürgen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX53 fec claims to be compatible to i.MX25 and i.MX53. In barebox
we do not have to make differences between i.MX25 and i.MX27 though, so
just fall back to i.MX27.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pinctrl support is devicetree only, so only register it
when we actually have a devicetree. Otherwise we crash boards
using the iomux-v3 from platform code in pinctrl_register().
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We used to populate the devices from the devicetree based on the
presence of the 'reg' property. This is incorrect since this only
allows us to probe devices with resources.
Instead use the 'simple-bus' property to see if we have iterate
deeper. This also registers devices with their buses as parents.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
memory is always in /mem, so call of_add_memory from of_probe once
instead of in the recursive tree iteration. This makes it possible
to limit the device population to nodes with the "simple-bus" property
set.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When registering devices from the devicetree we check if these
devices already exist. When doing this not only check the resource
start but also the resource end.
This helps with the probing of simple buses for which child nodes
often begin at the very same address as the parents.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Patch adds gpio_to_desc helper for validate GPIO.
A bit optimization is performed (about -160 bytes on ARM).
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this fix the problems introduced when detecting non ONFI flashes in
commit 4c2bdc8728
"nand_base: detect more ONFI flash"
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit adds minimal support for the Marvell Dove SoC (88AP510) as
first SoC of the Marvell Orion family. Orion SoCs have a different timer,
therefore current mach-mvebu and Armada 370/XP Kconfig and Makefiles are
slightly modified and a new clocksource drivers is added.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch separates out the "generic" memory
segment registration function (of_add_memory_bank())
from of_add_memory().
The MIPS architecture has different view on memory
resources than the ARM and PPC architectures
so the "generic" of_add_memory_bank() is
unusable for the MIPS architecture.
We can add MIPS-specific of_add_memory_bank()
into arch/mips code.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit adds minimal support for the Armada 370 and Armada XP SoCs
from Marvell.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a pinctrl driver for the Tegra 20 line of SoCs. It only
supports the three basic pinconfiguration settings function mux,
tristate control and pullup/down control.
The driver understands the same devicetree bindings as the Linux one,
unimplemented pinconfiguration options will be ignored.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Using the MXS MCI driver with an eight bit capable eMMC results into the
'devinfo' message the interface uses '0' bits for data transfer:
barebox:/ devinfo mxs_mci0
resources:
num : 0
start : 0x80034000
size : 0x00002000
driver: mxs_mci
bus: platform
Interface
Min. bus clock: 1476 Hz
Max. bus clock: 48000000 Hz
Current bus clock: 24000000 Hz
Bus width: 0 bit
The eight bit interface width is stored internally as value '2'. And a two bit
'2' ends up into 0xfffffffe when used as an array index. Using an unsigned
field instead fixes this issue:
barebox:/ devinfo mxs_mci0
resources:
num : 0
start : 0x80034000
size : 0x00002000
driver: mxs_mci
bus: platform
Interface
Min. bus clock: 1476 Hz
Max. bus clock: 48000000 Hz
Current bus clock: 24000000 Hz
Bus width: 8 bit
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
DISK_DRIVE is missing in Kconfig, so remove the "select" statement.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
EIO is a better error message to describe the data transfer to or from the SD cards has failed.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The host limits are only one limit we must honor when changing the transmission frequency.
The SD cards have their own limits, so take them also into account.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
According to the SD card spec the detection can happen at 400 kHz
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since a generic block reset function is a available, also the MCI driver
should make use of it.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MMC_BUS_WIDTH_* macros do not correspond with the real bus width.
After setting a bus width larger than 1 bit the next call to change the
frequency ends in the default handler and the host interface stays silently
at the previous frequency.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Remove some leftover from former powerpc support which has no
relevance for i.MX based esdhc controllers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Linux expects linux,initrd-end to contain the first unused address. As
this doesn't match the end semantic used by barebox (i.e. end contains
the last used address) adding one is necessary.
Without this change Linux fails for me to correctly extract a gzipped
cpio archive provided as initrd.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This switches the iomux-v3 (found on i.MX25,35,51,53,6) to pinctrl
support. The old SoC specific API is kept for compatibility. The
pinctrl devicetree support is enabled automatically when OFDEVICE
support is available.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is a massively stripped down pinctrl support. The upper API
consists of only of:
int pinctrl_select_state(struct device_d *dev, const char *state);
This is used to setup the pinmux for a device to a certain state.
This function normally does not need to be called manually. The
device core will setup the default state before probing a device.
The pinctrl core has the job of handling the devicetree. It parses
the pinctrl phandles for a device from devicetree, finds the correct
pinctrl device and calls its set_state callback with the pinctrl
setup device node.
The simplicity of this pinctrl framework comes from the fact that
we:
- Limit usage to devicetree only for now. For non devicetree use the
old legacy SoC specific APIs still can be used.
- Do not parse the devicetree into internal data structures which
are used by the drivers later. This adds the overhead that we
may parse the devicetree multiple times for more dynamic setups,
but on the other hand we do not need to parse devices from the
devicetree we don't use in barebox
- Do not detect resource conflicts. Since the framework mainly is
a devicetree parser this would be hard to implement. It should
be easy for board maintainers to avoid resource conflicts though.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Rename "drivers/gpio.c" to "drivers/gpiolib.c".
Reason is for understand functionality of driver.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
pass a struct cdev instead of the cdev name to of_parse_partitions.
This is available to the caller anyway and makes it easier to use
additional stuff from the cdev (like knowing whether it's a mtd
device).
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The phandles have to be parsed completely before registering the devices
from the devicetree. Otherwise drivers can't rely on of_find_node_by_phandle
in their probe.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Taken from the Linux kernel, simplified and reworked to match barebox.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Tested-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
actually ops.ooboffs is not defaulted so when its value gets
added to chip->oob_poi in nand_fill_oob or nand_transfer_oob
the respective memcpy is using a wrong address.
With this patch, both md -s /dev/nandraw0 and cp xyz /dev/nandraw0.sb
are working fine on an i.MX28 target (instead of crashing the board).
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
if the flash has a known type, the ONFI detection won't occur
and thus we may not detect the right parameters.
By testing both namd and pagesize, as done in the kernel, we
can detect ONFI flash with know IDs.
As an example on an i.MX53 board :
- without the patch :
NAND device: Manufacturer ID: 0x2c, Chip ID: 0xd3
(Micron NAND 1GiB 3,3V 8-bit), page size: 4096, OOB size: 128
- with the patch :
ONFI flash detected ... ONFI param page 0 valid
NAND device: Manufacturer ID: 0x2c, Chip ID: 0xd3
(Micron MT29F8G08ABACAWP), page size: 4096, OOB size: 224
in the first case the OOB size is wrong.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit 17176c2e2b adds a test of a new RTC
register flag to distinguish a system reset and a wake up event. Shame on me,
I have forgotten to define the newly used flag yet.
While already here, I also try to document the other flags the RTC provides.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
of_get_phy_mode to parse the phy mode from the devicetree and
of_get_mac_address to parse a MAC address from the devicetree.
Directly taken from the Kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The core has a bit for swapping packet data endianism.
Reset default from Cadence is off. Xilinx however, that uses this core on the
Zynq SoCs, opted for on. Turn it off for all devices.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The macb/gem core is used by the Zynq SoC. In preparation of sharing
the macb driver between at91 and Zynq, rename the platform data to
'struct macb_platform_data', and move the definition to a common
location.
Signed-off-by: Josh Cartwright <joshc@eso.teric.us>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
commit 5f03074 changed storing struct resource end insted of size.
Fix calculation of end in fb
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If a key is pressed but not released before booting and the key is
connected to an active low gpio it's not detected. This patch solves
that.
Signed-off-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Antony Pavlov
Oleksij Rempel
Alexander Shiyan
wilhelm
Oleksij Rempel
Eric Bénard
Sebastian Hesselbarth
Thomas Petazzoni
Lucas Stach
Juergen Beisert
Jean-Christophe PLAGNIOL-VILLARD
Uwe Kleine-König
Jan Luebbe
Hubert Feurstein
Steffen Trumtrar
Josh Cartwright
Jan Weitzel
Vicente Bergas