Many cfi chips support 16 and 8 bit modes. Most important
difference is use of so called "Q15/A-1" pin. In 16bit mode this
pin is used for data IO. In 8bit mode, it is an address input
which add one more least significant bit (LSB). In this case
we should shift all adresses by one:
For example 0xaa << 1 = 0x154
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some parameters may wish to provide some information about their
meaning or possible values. Provide an info callback for parameters.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The fdt reserve map needs address/size values, not address/end values
like accidently done for generating the reserve entry for the dt.
Reported-by: Jürgen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX53 fec claims to be compatible to i.MX25 and i.MX53. In barebox
we do not have to make differences between i.MX25 and i.MX27 though, so
just fall back to i.MX27.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pinctrl support is devicetree only, so only register it
when we actually have a devicetree. Otherwise we crash boards
using the iomux-v3 from platform code in pinctrl_register().
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We used to populate the devices from the devicetree based on the
presence of the 'reg' property. This is incorrect since this only
allows us to probe devices with resources.
Instead use the 'simple-bus' property to see if we have iterate
deeper. This also registers devices with their buses as parents.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
memory is always in /mem, so call of_add_memory from of_probe once
instead of in the recursive tree iteration. This makes it possible
to limit the device population to nodes with the "simple-bus" property
set.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When registering devices from the devicetree we check if these
devices already exist. When doing this not only check the resource
start but also the resource end.
This helps with the probing of simple buses for which child nodes
often begin at the very same address as the parents.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Patch adds gpio_to_desc helper for validate GPIO.
A bit optimization is performed (about -160 bytes on ARM).
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this fix the problems introduced when detecting non ONFI flashes in
commit 4c2bdc8728
"nand_base: detect more ONFI flash"
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit adds minimal support for the Marvell Dove SoC (88AP510) as
first SoC of the Marvell Orion family. Orion SoCs have a different timer,
therefore current mach-mvebu and Armada 370/XP Kconfig and Makefiles are
slightly modified and a new clocksource drivers is added.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch separates out the "generic" memory
segment registration function (of_add_memory_bank())
from of_add_memory().
The MIPS architecture has different view on memory
resources than the ARM and PPC architectures
so the "generic" of_add_memory_bank() is
unusable for the MIPS architecture.
We can add MIPS-specific of_add_memory_bank()
into arch/mips code.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit adds minimal support for the Armada 370 and Armada XP SoCs
from Marvell.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a pinctrl driver for the Tegra 20 line of SoCs. It only
supports the three basic pinconfiguration settings function mux,
tristate control and pullup/down control.
The driver understands the same devicetree bindings as the Linux one,
unimplemented pinconfiguration options will be ignored.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Using the MXS MCI driver with an eight bit capable eMMC results into the
'devinfo' message the interface uses '0' bits for data transfer:
barebox:/ devinfo mxs_mci0
resources:
num : 0
start : 0x80034000
size : 0x00002000
driver: mxs_mci
bus: platform
Interface
Min. bus clock: 1476 Hz
Max. bus clock: 48000000 Hz
Current bus clock: 24000000 Hz
Bus width: 0 bit
The eight bit interface width is stored internally as value '2'. And a two bit
'2' ends up into 0xfffffffe when used as an array index. Using an unsigned
field instead fixes this issue:
barebox:/ devinfo mxs_mci0
resources:
num : 0
start : 0x80034000
size : 0x00002000
driver: mxs_mci
bus: platform
Interface
Min. bus clock: 1476 Hz
Max. bus clock: 48000000 Hz
Current bus clock: 24000000 Hz
Bus width: 8 bit
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
DISK_DRIVE is missing in Kconfig, so remove the "select" statement.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
EIO is a better error message to describe the data transfer to or from the SD cards has failed.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The host limits are only one limit we must honor when changing the transmission frequency.
The SD cards have their own limits, so take them also into account.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
According to the SD card spec the detection can happen at 400 kHz
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since a generic block reset function is a available, also the MCI driver
should make use of it.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MMC_BUS_WIDTH_* macros do not correspond with the real bus width.
After setting a bus width larger than 1 bit the next call to change the
frequency ends in the default handler and the host interface stays silently
at the previous frequency.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Remove some leftover from former powerpc support which has no
relevance for i.MX based esdhc controllers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Linux expects linux,initrd-end to contain the first unused address. As
this doesn't match the end semantic used by barebox (i.e. end contains
the last used address) adding one is necessary.
Without this change Linux fails for me to correctly extract a gzipped
cpio archive provided as initrd.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This switches the iomux-v3 (found on i.MX25,35,51,53,6) to pinctrl
support. The old SoC specific API is kept for compatibility. The
pinctrl devicetree support is enabled automatically when OFDEVICE
support is available.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is a massively stripped down pinctrl support. The upper API
consists of only of:
int pinctrl_select_state(struct device_d *dev, const char *state);
This is used to setup the pinmux for a device to a certain state.
This function normally does not need to be called manually. The
device core will setup the default state before probing a device.
The pinctrl core has the job of handling the devicetree. It parses
the pinctrl phandles for a device from devicetree, finds the correct
pinctrl device and calls its set_state callback with the pinctrl
setup device node.
The simplicity of this pinctrl framework comes from the fact that
we:
- Limit usage to devicetree only for now. For non devicetree use the
old legacy SoC specific APIs still can be used.
- Do not parse the devicetree into internal data structures which
are used by the drivers later. This adds the overhead that we
may parse the devicetree multiple times for more dynamic setups,
but on the other hand we do not need to parse devices from the
devicetree we don't use in barebox
- Do not detect resource conflicts. Since the framework mainly is
a devicetree parser this would be hard to implement. It should
be easy for board maintainers to avoid resource conflicts though.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Rename "drivers/gpio.c" to "drivers/gpiolib.c".
Reason is for understand functionality of driver.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
pass a struct cdev instead of the cdev name to of_parse_partitions.
This is available to the caller anyway and makes it easier to use
additional stuff from the cdev (like knowing whether it's a mtd
device).
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The phandles have to be parsed completely before registering the devices
from the devicetree. Otherwise drivers can't rely on of_find_node_by_phandle
in their probe.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Taken from the Linux kernel, simplified and reworked to match barebox.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Tested-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
actually ops.ooboffs is not defaulted so when its value gets
added to chip->oob_poi in nand_fill_oob or nand_transfer_oob
the respective memcpy is using a wrong address.
With this patch, both md -s /dev/nandraw0 and cp xyz /dev/nandraw0.sb
are working fine on an i.MX28 target (instead of crashing the board).
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
if the flash has a known type, the ONFI detection won't occur
and thus we may not detect the right parameters.
By testing both namd and pagesize, as done in the kernel, we
can detect ONFI flash with know IDs.
As an example on an i.MX53 board :
- without the patch :
NAND device: Manufacturer ID: 0x2c, Chip ID: 0xd3
(Micron NAND 1GiB 3,3V 8-bit), page size: 4096, OOB size: 128
- with the patch :
ONFI flash detected ... ONFI param page 0 valid
NAND device: Manufacturer ID: 0x2c, Chip ID: 0xd3
(Micron MT29F8G08ABACAWP), page size: 4096, OOB size: 224
in the first case the OOB size is wrong.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit 17176c2e2b adds a test of a new RTC
register flag to distinguish a system reset and a wake up event. Shame on me,
I have forgotten to define the newly used flag yet.
While already here, I also try to document the other flags the RTC provides.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
of_get_phy_mode to parse the phy mode from the devicetree and
of_get_mac_address to parse a MAC address from the devicetree.
Directly taken from the Kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The core has a bit for swapping packet data endianism.
Reset default from Cadence is off. Xilinx however, that uses this core on the
Zynq SoCs, opted for on. Turn it off for all devices.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The macb/gem core is used by the Zynq SoC. In preparation of sharing
the macb driver between at91 and Zynq, rename the platform data to
'struct macb_platform_data', and move the definition to a common
location.
Signed-off-by: Josh Cartwright <joshc@eso.teric.us>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
commit 5f03074 changed storing struct resource end insted of size.
Fix calculation of end in fb
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If a key is pressed but not released before booting and the key is
connected to an active low gpio it's not detected. This patch solves
that.
Signed-off-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as we use a full buffer no need to check the SOF
and reset the rx_tail
fix at the same time the gem detection so we can have the rx_buffer
allocated correctly according to the IP
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows us to better detect whether a clk is enabled or not.
- If we can ask a clk, ask it. If it's enabled, go on and ask parents
- If we can't ask it, but it can be enabled, depend on the enable_count.
if it's positive, go on and ask parents
- If we can't ask it and it cannot be enabled, assume it is enabled
and ask parents.
This makes the CLK_ALWAYS_ENABLED unnecessary, since the fixed clk now
always returns 1 in its is_enabled callback.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Wait until fifo is empty, not until fifo is not full.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some systems are runnignfrom a very limited SRAM, but have a huge
malloc space in SDRAM. The bss normally is in SRAM, so we should
avoid having big structures there. The gpio_desc table is 3072 bytes
big, so allocate it dynamically instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
struct bus_type contains an embedded struct device_d which is quite
a big structure. Dynamically allocate this instead to save the space
in the binary.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fix chipidea-imx usb initialization.
"imx_chipidea_port_init" was moved before PORTSC setup in the
commit "USB i.MX chipidea: implement post init support". This
change breaks usb function with ULPI. Patch moves port initialization
back after PORTSC setup, so it works again.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
by reordering the entry, USB gadget support is now a menu and the
USB gadget choices are under this menu and not directly in the
driver menu.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds support for system controller register driver (SYSCON).
Code taken from Linux Kernel and adapted for using in barebox.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds support for CLPS711X GPIOs. Driver based on
generic GPIO driver.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds generic memory-mapped GPIO controller support.
Code taken from Linux Kernel and adopted for barebox.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds clocksource driver for CLPS711X targets and adds
support to platform to use this new driver.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With 2k NAND flashes the data layout in memory is not what is
written on the flash device. This leads to the result that the
factory provided bad block markers are not recognized correctly.
To preserve the factory bad block information the i.MX NAND driver
will not scan for the bad blocks itself when there is no flash based
bbt available, because the mtd layer would do so based on wrong
information. Instead, a new command is introduced which allows to
manually create a flash bbt based on the correct information.
As this command is tightly coupled to mtd and the i.MX NAND driver
the command is placed under drivers/mtd/nand/ instead of commands/
where a command normally belongs to.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The information which kind of bbt (if any) is used is hidden somewhere
in the NAND layer. Expose it to a device parameter to make it detectable
and visible during runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that we have framework support for delayed probing of
ata devices implement it in the ahci driver to actually make use
of it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ata device usually take a long time to spin up, so it makes sense
to only spend this time when the device is actually used.
This adds a logical ata device and attaches a 'probe' parameter
to it, similar to what MMC does.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The following commit accidently bailed out if the link is up, not
when it's down as stated in the commit message.
| commit a3f74d928c
| Author: Rob Herring <rob.herring@calxeda.com>
| Date: Mon Feb 11 18:02:00 2013 +0100
|
| ahci: handle COMINIT received during spin-up
|
| Some Intel SSDs can send a COMINIT after the initial COMRESET. This causes
| the link to go down and we need to re-initialize the link.
|
| Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
OFDEVICE decides whether or not we compile in support for probing
devices from the devicetree. Let the user decide this explicitly.
This makes the oftree, of_node and of_property commands independent
of devicetree device support since being able to manipulate
devicetrees has nothing to do with probing devices from the devicetree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In order to be able to handle multiple devicetrees, do not assume
the tree to be unflattened is the barebox internal one. Instead,
just return a pointer to it and assign the barebox internal root_node
external to the unflatten function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The allnodes list makes it hard to handle multiple devicetrees. Having
a list to iterate over all nodes of a tree is still good to have though.
This patch uses the list_head of the root node as the head of the list.
This way the root node is no longer part of the list, but when iterating
over a tree the root node is not interesting anyway.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
of_find_node_by_path iterates over the allnodes list. Depending on
where the node we look for is, this can be significantly slower than
using the tree structure to look for a node, so iterate over the tree
instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fixes following warning:
drivers/w1/w1.c: In function 'w1_found':
drivers/w1/w1.c:471: warning: integer constant is too large for 'long' type
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fixes following warning:
drivers/mtd/nand/nand_write.c: In function 'nand_do_write_ops':
drivers/mtd/nand/nand_write.c:272: warning: 'ret' may be used uninitialized in this function
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
While erasing bad blocks is a potentially dangerous operation
it is sometimes needed during development or when some foreign
code has touched the flash.
This patch adds a device parameter 'erasebad' to allow erasing
bad blocks. Since this is not wanted during production this is
behind a Kconfig option.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows us to have some NAND specific stuff during registration,
like for example adding NAND specific device parameters.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since recently we check for the page being written for not being
empty and do not actually write it when it is. This fails for a
freshly created flash bad block table when all blocks are good.
In this case the bbt code will try to write an empty page, but
with the BBT marker in OOB. This page never gets written, so the
BBT code will not find a bad block table during next start up and
writes it again. Fix this by checking if we want to write OOB data,
if we do, then write the page, even if the data is empty.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
do not try to read the status in force mode
the link is up
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Do not write pages which only contain 0xff. UBI expects pages which
seem empty to be writable. This got lost with:
| commit 3139c3e9a6
| Author: Sascha Hauer <s.hauer@pengutronix.de>
| Date: Thu Nov 29 11:16:40 2012 +0100
|
| mtd core: call driver write function with complete buffer
|
| mtd->write is supposed to loop around pages internally, no need
| to do this in mtd_write. This fixes a huge write performance drop
| with the m25p80 driver when it was converted to a mtd driver recently.
| Since mtd->writesize is 1 for this driver mtd_write ended up doing
| single byte writes on the flash.
Introduce mtd_all_ff as a global function since UBI currently has its own
implementation.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
RTS is an output. Either flow control is used and you care about the state or
it is not used and you don't care. So setting it to active does no harm in
either case. This is inline with what Linux does.
Mandatory for Highbank as example
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides rename MFD-related symbols for using MFD-prefix.
Additionally, sorting mfd/Kconfig and mfd/Makefile records.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds USB gadget support to the i.MX chipidea driver. Basically
we have to add a register function to the fsl udc driver and call
this from the chipidea driver if device mode is selected.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
CFI Flash is currently handled outside the mtd layer which makes it
a special case. Integrate it into mtd so that we get rid of this
special status.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of dereferencing struct mtd_info members directly use
the wrapper functions which have an additional check if the
callback exists if it is optional, like mark_bad or is_bad.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Kernel has mtd_read, mtd_write, mtd_erase and mtd_block_markbad.
Add these functions to barebox aswell to make future mtd synchronizations
with the kernel easier.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These are currently named mtd_read/write/erase. Functions with
the same name exist as global functions in the kernel. Rename
them to mtd_op_* to avoid name clashes with future mtd updates.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
HSIC needs some special setup for i.MX6. Most ugly detail is that
the HSIC needs help of the IOMUX to configure a pullup on the strobe
line. This has to be done after the ehci controller has started.
Fortunately there is only one muxing possibility for the HSIC ports
on i.MX6, so we can simply control the iomux from the usbmisc driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some controllers need an init hook after the USB controller is
started, so implement the post init hook for i.MX.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
calxeda use the generic driver but have it's own compatible cf Linux kernel
Documentation
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so when the first stage booloader of firmware provide the dtb
we can use it to probe the memory
also allow to print what we probe
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some Intel SSDs can send a COMINIT after the initial COMRESET. This causes
the link to go down and we need to re-initialize the link.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>