The idea is to panic() when there is no memory available for normal
operation. Exception: code which can consume arbitrary amount of RAM
(example: files allocated in ramfs) must report error instead of panic().
This patch also fixes code which didn't check for NULL from malloc() etc.
Usage: malloc(), memalign() return NULL when out of RAM.
xmalloc(), xmemalign() always return non-NULL or panic().
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch updates the clock dividers for the graphics
processor.
It is based on commit:
c4e1d9b718b65436e30422506f43fa4eb21069d3
at http://arago-project.org/git/projects/?p=u-boot-omap3.git
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In function get_osc_clk_speed(), the SYS_CLK divider
was being changed 'suddenly'.
This change has cascading effect on the derived clocks,
leading to inconsistent behavior - often a crash.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds the basic clock initizlization for OMAP36XX.
Portion of this patch is based on commit:
29587220909e639cda4fb5a35cb5bf33aba242b9
at http://arago-project.org/git/projects/?p=x-load-omap3.git
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch defines functions that contain steps to configure
DPLL for each clock domain.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds the DPLL tables for OMAP36XX and the
necessary functions to access these tables.
Both definitions follow the conventions used for
OMAP34XX.
All tables, currently, correspond to SYSCLK at 26MHz.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The PER domain dpll significantly differs from 34x.
This patch defines struct to collate related info.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds support to detect the different
OMAP36XX silicon revisions.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds the support to detect OMAP3630.
It also re-organizes the CPU_xxxx definitions in sys_info.h
to ascending order so that newer silicons can be added at
bottom.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This (re)enables boards to have multiple boot headers so that the one
image can be used for booting from multiple boot sources.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds suffix 34x to DPLL tables and related functions to
indicate that they are applicable to OMAP34XX only.
The suffix was required to prepare for support of OMAP36XX in the
subsequent patch series.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch updates the DPLL functions to return correct
DPLL table based on the cpu revision.
The DPLL table for PER domain is same across all revisions,
but the function signature has been updated to maintain
consistency in the API definition.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Content from monolith implementation in prcm_init() has been
moved into separate functions - per clock domain. This makes
code easy to adapt for silicon revisions and families.
Few cosmetic changes may have been done during this movement.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds DPLL tables for OMAP34xx ES1.0 and ES2.0.
When more than one table is added, the get_xxx_dpll_param()
was updated to use the tables corresponding to ES2.0 to
ensure that current functionality doesn't break.
In addition, the tables have been reformatted for better
readability.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch ensures that all silicon revisions
are detected. (Current implementation cannot
detect ES1.0).
In the process, the 'seemingly' hardcoded macros
identifying cpu revision (e.g. CPU_ES1P1) have
been updated to include the CPU name as well.
(The mapping of IDCODE value to silicon revision
may not be same across different OMAP families).
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch sets the cpu type based on the hawkeye value
read from the IDCODE register. So far, cpu type was
hardcoded.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds macros to extract the hawkeye
and version number from IDCODE value.
Updated function get_cpu_rev() to use new macro.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There is no really need for restricted variable types for the parameters.
Replace them by standard C types with the same behaviour.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In order to support video graphics output on i.MX23/i.MX28 based platforms,
a calculation routine for the pixel clock is required.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With the change to Hz as the main clock unit on the STM architecture the
Chumby must also use this unit.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This file is to be used in conjunction with the TX28 CPU module.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX28 comes with an extended ethernet controller (ENET/FEC) which
is backwards compatible to the FEC known from other i.MX CPUs. Add a few
adaptions to the existing driver to make it work with the MX28 FEC.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX28 shares a lot of functionality with its predecessor, the
i.MX23 (formerly known as stm378x). This patch adds some files to support
both CPUs.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
At least the FEC and the CAN controller drivers can also be used by the i.MX28.
When still used by IMX, the i.MX28 (and maybe i.MX23) related code must be
ignored.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Separate i.MX23 clock handling to simplify the addition of the upcoming i.MX28.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is for easier integration of the i.MX28 architecture (to share the code
later on).
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i.MX23 currently uses kHz as the unit for its clock handling and calculation
to avoid overflows when calculation with the internal 480 MHz PLL and its
fractional divider. This patch changes all routines to accept Hz and deliver
Hz as the clock unit.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
tested with qemu only
qemu-system-arm -M versatilepb -monitor null -kernel barebox -net nic -net user -tftp "<uImage-path>/" -serial stdio
add -nographic if you do not want the lcd via sdl
Signed-off-by: Alexey Zaytsev <alexey.zaytsev@gmail.com>
update:
- use default env
- move arm_timer.h as in the kernel
- add nor flash support
- udpate defconfig
- fix copyright copy from linux
- fix ARCH_TEXT_BASE
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Simplifies specifying gpio numbers from bank/number info.
From linux kernel.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MINI240 board has available always 64M of memory so add
size to memory device structure.
Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The patch introducing device macros for i.MX accidently registered a
imx-mmc device for i.MX25/35/51. It should be a imx-esdhc device. This
patch fixes tis
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The m68k support is compile broken for a long time now and nobody
cared so far. We cannot keep the architecture uptodate with current
development wihtout being able to compile it. It's still in the
archives and can be re-added anytime once somebody cares for.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fix following compilation warning:
../devices-imx31.h: In function 'imx31_add_fb':
../devices-imx31.h:34: warning: passing argument 2 of 'imx_add_ipufb'
from incompatible pointer type
Signed-off-by: Marek Belisko <marek.belisko@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Patch fix following compilation error:
../mini2440.c:33:28: error: asm/mach-types.h: No such file or directory
../mini2440.c: In function 'mini2440_devices_init':
../mini2440.c:113: error: 'MACH_TYPE_MINI2440' undeclared (first use in this function)
../mini2440.c:113: error: (Each undeclared identifier is reported only once
../mini2440.c:113: error: for each function it appears in.)
Signed-off-by: Marek Belisko <marek.belisko@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Here are the modification to at91sam9261 files dedicated to the support of
at91sam9g10. This direction has been adopted to minimize code duplication.
All at91sam9261 drivers are enabled in _devices and board files. Modificaton
to peripherals that support at91sam9g10 will be added in future patches.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Here are the at91 specific files dedicated to the at91sam9g45 series. They
mimic the traditional at91 way of managing chips & boards.
The first board that embeds at91sam9g45 chip is the AT91SAM9M10G45-EK. In
the future, we will add the m10 and other boards revisions
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
AT91sam9261 series is an ARM 926ej-s SOC family clocked at 190/100MHz.
The first board that embeds at91sam9261 chip is the AT91SAM9261-EK.
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
This work is mainly based on a9m2440 board implementation
from Juergen Beisert <jbe@pengutronix.de>. Functionality
was tested only running barebox from ram. Loading to flash
and booting will not work because missing lowlevel_init
functionality (lack of jtag debugger on my side ;)).
Signed-off-by: Marek Belisko <marek.belisko@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Krzysztof Halasa
Sanjeev Premi
Marc Reilly
Juergen Beisert
Alexey Zaytsev
Marek Belisko
Jean-Christophe PLAGNIOL-VILLARD
Marek Belisko
Eric Bénard