This moves the known i.MX bootsource settings to a single file
so that the code can be shared. Also we add a enum for the different
boot sources so that it can be used in C Code and not only on the shell.
The pcm038 board is changed to use it instead of digging in the registers
manually.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On i.MX we enable all necessary clocks during startup of the clock
controller driver, so we do not need the register hacking in the drivers
anymore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provide setup for SPI clk frequency global to driver.
For MC13783 maximum clock frequency is 20 MHz,
for MC13892 maximum clock frequency is 26 MHz,
so we define 20 MHz as a maximum SPI clk.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Here is a test output:
barebox 2012.07.0-00136-ge3ab4bc-dirty #23 Tue Jul 3 23:10:44 MSK 2012
Board: Phytec phyCORE-i.MX27
mc13xxx-spi@mc13xxx-spi0: Found MC13783 ID: 0x00009b [Rev: 3.1]
cfi_flash@cfi_flash0: found cfi flash at c0000000, size 33554432
NAND device: Manufacturer ID: 0x20, Chip ID: 0x36 (ST Micro NAND 64MiB 1,8V 8-bit)
Bad block table found at page 131040, version 0x01
Bad block table found at page 131008, version 0x01
imxfb@imxfb0: i.MX Framebuffer driver
cfi_protect: protect 0xc0080000 (size 1048576)
Using environment in NOR Flash
Found NXP ISP150x ULPI transceiver (0x04cc:0x1504).
ehci@ehci0: USB EHCI 1.00
imx-mmc@mci0: registered as mci0
Malloc space: 0xa6f00000 -> 0xa7efffff (size 16 MB)
Stack space : 0xa6ef8000 -> 0xa6f00000 (size 32 kB)
running /env/bin/init...
Hit m for menu or any other key to stop autoboot: 3
type exit to get to the menu
barebox@Phytec phyCORE-i.MX27:/ mci0.probe=1
mci@mci0: registered disk0
barebox@Phytec phyCORE-i.MX27:/ devinfo mci0
resources:
driver: mci
Card:
Attached is an SD Card (Version: 1.10)
Capacity: 1962 MiB
CID: 1C535653-44432020-1000013C-7E007200
CSD: 005E0032-5F5A83D5-2DB7FFBF-96800000
Max. transfer speed: 25000000 Hz
Manufacturer ID: 1C
OEM/Application ID: 5356
Product name: 'SDC '
Product revision: 1.0
Serial no: 81022
Manufacturing date: 2.2007
Parameters:
probe = 1
barebox@Phytec phyCORE-i.MX27:/ mkdir /d
barebox@Phytec phyCORE-i.MX27:/ mount /dev/disk0.0 fat /d
barebox@Phytec phyCORE-i.MX27:/ ls /d
barebox.bin
barebox@Phytec phyCORE-i.MX27:/
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The value already is set by calling gpio_direction_output.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Actually ISP1504 ULPI chip are installed on PCM970 development board.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some devices need to be moved to the PCM970 source file later, because
in fact these devices are not installed on the main unit PCM038.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Power and frequency should be setup before initialize other devices.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since we do not have ISP1504-related functions, we migrated to ULPI.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The image built with pcm038_defconfig is >256k so increase
the size of the barebox partition.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without num_modes the imx fb driver won't work. Specify this
in the boards and also bail out in the driver when num_modes
is unspecified.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Newer pcm038 are populated with a PC28F256P30BFE NOR-Flash.
This flash requires different CS values.
The values also work with older NOR-Flashes.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To allow for some generic io accessors introduce io.h and use
this instead of asm/io.h throughout the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer <s.hauer@pengutronix.de> wrote ..
> On Thu, Aug 11, 2011 at 02:37:05PM +0400, Alexander Shiyan wrote:
> > Hello.
> >
> > Please review and apply this simple patch.
...
> Please remove the #ifdef CONFIG_I2C
OK.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The new MMU setup will need SDRAM base addresses and sizes.
For this reason convert the MMU enabled ARM boards:
- move mem setup to mem_initcall. This is early but
still makes sure that we already have the console available
- move MMU setup in this initcall temporary as after the mmu_init will generic
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
pass the hccr and hcor register base via resource
instroduce add_generic_usb_echi_device with hccr = base + 0x100 and
hcor = base + 0x140
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Add a helper function for boards to register their memory
devices. This makes the board code smaller and also helps
getting rid of map_base and struct memory_platform_data.
And switch all of the memory to it
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
we keep struct memory_platform_data for now on we will switch off the memories
resources to struct resource
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Often enough the exception vectors are not on TEXT_BASE (for example
on i.MX SoCs in internal boot mode), so the board specific code did
not map the exception vectors to 0x0 but whatever happens to be on
TEXT_BASE. Also, the current section-only mapping requires the
exception vectors to be on a 1MB boundary.
Instead, create the possibility to create second level tables and
use this to map a copy of the exception vectors in a board
independent way.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Changing PLL settings is somehow tricky on the i.MX27: Whenever the clock
speed of the main PLL is changed, the clock stops for about 100 us until the
PLL locks into the new frequency. While this clock stop, also the SDRAM
controller cannot refresh the memory, because it uses the same clock source.
This can lead into data loss and random system crashes.
This patch divides the PLL setting in two steps. First step is to re-program
the PLL and clock settings to values possible at a core supply of 1.25 V.
Second step is to increase the core power supply to 1.45 V and switch the
CPU clock to the specified 400 MHz.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
before if you specify id = 0 the next available id will be taken
otherwise fail if already registered now as in linux we use -1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will allow each arch to handle the boards more simply and depending on
there need
the env var BOARD will refer to the current board dirent
for sandbox as we have only one board the board dirent is arch/sandbox/board
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Alexander Shiyan
Jean-Christophe PLAGNIOL-VILLARD
Teresa Gámez
shc@milas.spb.ru
Juergen Beisert