as d1 pioB18 is used for the one wire too
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
imported from the kernel
this allow to simplify the mux implemtation and will simplify the gpio support
from bare_init or pbl
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this is the first step to prepare the switch to the gpiolib
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so 0 is a valid gpio as cleanned in the kernel
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
switch gpio type from u8 to int in the data struct
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MC34708 depend on I2C or SPI, so let driver depend on SPI too
and rename config option name to MFD_MC34708.
Signed-off-by: Wjatscheslaw Stoljarski <wjatscheslaw.stoljarski@kiwigrid.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Created ARCH for AM33xx boards as second stage bootloader.
This includes:
- Added dmtimer0
- Created basic header files
- Added MMC support for ARCH_AM33XX
- Added reset function
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Some header file cleanup by:
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The hsmmc module has a 0x100 offset in its register space. The real
register space size for the module is 4K, so when we register the
device with the size 4k, we have to account for the offset in the
driver, not in the resource allocation.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- remove mach/silicon.h and include omap?-silicon.h directly
- include mach/omap?-clock.h directly where needed
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARCH_OMAP2 missing in barebox.
ARCH_OMAP3 and ARCH_OMAP4 is only choice for this target.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Efika MX Smartbook is a i.MX51 based netbook. This patch adds
nearly full support for it including:
- USB
- SD card slots
- Internal SPI NOR flash
- Internal flash PATA drive
- LEDs
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The board variant found on the AT24 EEPROM holds the variant ID that we
can use to identify which expansion board we are running on and thus
which device tree to load and pass to the kernel.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The AT24 found on the expansion boards store the variant of the board it
is soldered onto.
That means that we are that way able to determine what expansion board
is currently plugged in if any. If we can't communicate with the EEPROM,
we just assume that only the CFA-10036 is there.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This EEPROM is found on the expansion boards available for the 10036
module. Since we won't need to do anything fancy except reading/writing
from it, use bitbanging to communicate with it.
This EEPROM will hold mostly the board_id so that we can determine if
there is an expansion board plugged in and what expansion board it is.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Trivial pbl support has no cpu specific setup.
We will add cache setup routines in the future.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch is based on ARM pbl support and allows
creating a pre-bootloader binary for compressed image.
For different MIPS SoCs (or even for different boards based
on the same SoC) the operations carried on in start-pbl.S
can be very different. The additional constraints can be imposed
on the size of the boot code or the special magic labels in
the beginning of the boot code; In some cases it could be
necessary to show CPU is alive as early as possible
(transmit a char via UART or blink a LED).
So the demands for pbl start operation can be very different.
E.g. malta board store boot code at the NOR flash mapped
to the MIPS power-on address (0xbfc00000); it is the most
simple case: we need just copy pbl image from direct-mapped
flash to RAM and jump there.
The XBurst-powered boards store boot code in the beginning
of a NAND flash or in the beginning of SD/MMC card.
In this case we must use simple and short NAND or SD/MMC access
routines to copy pbl image to RAM.
To meet so different demands a simple technique is selected:
* MIPS pbl entry point located in file arch/mips/boot/start-pbl.S.
* MIPS pbl code (see start-pbl.S) assumes that every pbl-enabled
board has a arch/mips/boards/<BOARD>/include/board/board_pbl_start.h
header file. This file must contain definition of
the board_pbl_start macro. This macro is used as start of pbl image;
* the most popular asm routines (stack setup, relocation to link
address, NS16550 initialization (WIP) and so on) are containt
in the arch/mips/include/asm/pbl_macros.h header file.
So board pbl macro can use it if necessary.
It is possible to create similar headers with macros for each
specific SoC; so even if we have many different boards based
on the same SoC the board_pbl_start macro for every board
can be short and clear.
* after board-specific initialization the stack pointer
is initialized and pbl C code is started.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ULPI lines are normally input to the USB port. In order to configure
the ULPI transceiver properly the ongoing transfers must be stopped. This
can be done by configuring the the STP pin as gpio output and drinving
it high.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Register the USB misc devices and provide convenience wrappers to
register the USB ports for i.MX27.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The smsc911x has a bootstrap pin for detecting an external phy.
Unfortunately this is pulled into the wrong direction on the pcm037
board, so force internal phy with platform data.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX27/31 have the second chip select enabled by reset default.
This can be considered as a hardware bug, because even boards which
need this settings cannot work out of reset because of the missing
initialization sequence. Detect this reset default setting and disable
this chipselect then to be able to properly detect the SDRAM size.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
omap3 has a soc specific reset function, make sure it calls common_reset
so that the proper CPU flags are set.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We allow unaligned accesses on ARMv6 onwards, make sure the CR_A
flag is cleared so that unaligned accesses do not trap.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Barebox not contain symbol HAS_PCI, so remove all references to it.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Barebox not contain symbol HAVE_MMU, so remove all references to it.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Barebox not contain symbol HAS_CFI, so remove all references to it.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides a global cleanup barebox Kconfig files. This includes
replacing spaces to tabs, formatting in accordance format, removing
extraneous lines and spaces. No functional changes.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The fec has multiple clock inputs:
- 50MHz clock for generating the (R)MII clock
- bus clock
The MDIO clock is derived from the bus clock, not the 50MHz clock,
so pass this into the driver so that it can correctly configure
the MDIO clock divider.
This fixes several wrong MDIO register read problems on i.MX28 boards.
Reported-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for the Garz+Fricke Vincell board. This has
a i.MX53 Processor with 512MB of DDR3 RAM.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for initializing DDR3 RAMs on the i.MX53 type
SDRAM controller. The code automatically detects size/layout of
the connected RAM, detects the bus width and which chipselects are
populated.
While I believe this code is not 100% generic, it is far too
sophisticated to stay in a single board directory. I'm sure
other boards could make use of this aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pll setup function is exported, so it makes sense to export
the convenience wrappers for specific frequencies aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some boards do not have a DCD table since they initialize everything
in code, so allow to skip it and leave the corresponding pointers
empty.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The code initializing the SDRAM controller is not at the same
place where SDRAM is registered with barebox. To reduce the
risk of registering wrong SDRAM sizes this patch adds a
driver for the ESDCTL which reads back the configured SDRAM
size and registers the memory found with barebox.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In recent reference manuals the plls were renumbered. PLL8 now is
PLL6 and vice versa. Change the code according to the reference
manual to avoid confusion.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ethernet PLL has a fixed frequency of 500MHz. What is adjustable
are additional dividers which we better describe separately.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add and use meaningful macro names for OMAP4 GPIO addresses, and add a
comment to explain the 0x100 offset for OMAP4.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In addition, collapse adjacent comment blocks into one and remove
extraneous blank lines.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds lowlevel debug functions for i.MX. As we have a great variety
of different UARTs on i.MX currently no Kconfig support for chosing the
correct one is added. Instead we expect the user to add the correct
define and issue a compiler warning if he hasn't.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
putc already is a regular barebox function. To avoid conflicts and
confusions just let architectures define PUTC_LL directly instead
of going through this addiotional redirection.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Pinmuxing was wrong and no GPMI device was created.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
structure is used within barebox only and there is no need to pack it.
As this option has a negative performance impact, remove it.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Pass the buffer size to the file detection code. This makes sure we do not
read past the buffer. This is especially useful for ext filesystem detection
as the magic is at byte offset 1080. Also introduce a FILE_TYPE_SAFE_BUFSIZE
define which is set to the minimum bufsize the detection code needs to detect
all known filetypes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The commit
commit d25d94bea6
Author: Antony Pavlov <antonynpavlov@gmail.com>
Date: Fri Jun 1 13:23:20 2012 +0400
MIPS: make possible board-specific header files
This patch makes possible to put a board-specific
header file (e. g. foobar.h) to arch/mips/boards/*/include/board/.
breaks the out-of-tree build for the boards that use it (rzx50).
Reported-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
today the timer rate is hardcoded to 6MHz which is wrong the PIT rate is MCK / 16
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we now create the cdev via mtd
This will also simplify sync with linux
to avoid the m25p8000 or m25p00 the cdev is still named name m25p and the
drivers m25p80
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since commit dc9d70e2 the define CCM_PDR4 is called MX35_CCM_PDR4.
sha: Added the same for cupid
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Update help info, it's slightly out of date, and a grammatical fix.
No functional change.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch sets HPM (Host power mask bit) to bit 16 according to i.MX
Reference Manual. Falsely it was set to bit 8, but this controls pull-up
Impedance.
Reported-by: Michael Burkey <mdburkey@gmail.com>
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as in the kernel use is_rmii
flags for pinctrl
phy_flags for phylib flags
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There is no need to add the command name to the "usage" info when
defining a command.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as the support atmel mci drivers does not work on rm9200 and we have the
possibility to use it as spi use it
Originally on rm9200 when the interface mci is in SPI mode we use a DataFlash Card
so allow it but if no dataflash card option is enable use as mmc spi.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
on the 9g20 low power version we have a mmc spi as microSD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
on the 9g20 low power version we have a mmc spi as microSD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
on all the cpu module we have a at25 except on the cogent where we have a at45
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio as the hw ip is broken
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio as the hw ip is broken
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio as the hw ip is broken
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio as the hw ip is broken
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio as the hw ip is broken
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio until we add the hw drivers
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The OUI will be 'tml' => 76:6D:6C
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The modules from cogent use a 1.8V nand
And have the mci card detect broken as they use the flash vdd as vdd for the
cd which need > 2V
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
for bootp specify the module version via client_id as
%{BOARD}-%{VERISON}
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The OUI will be 'ron' => 72:6F:6E
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The OUI will be 'ron' => 72:6F:6E
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The OUI will be 'ron' => 72:6F:6E
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fixes a linker error when PBL_IMAGE=n and DO_LOW_LEVEL_INIT=n.
In this configuration the symbol reset() was present multiple times,
and prevented the barebox image to be linked.
Signed-off-by: Christian Kapeller <christian.kapeller@cmotion.eu>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch remove a superfluous DCD command in TX53-xx30 flash header.
The entry DCD_WR_CMD(0x21c) just duplicates the contents of the last
imx_flash_header_v2 struct member dcd.
Removal of this DCD entry is needed to make the TX53 board boot again
from NAND.
Signed-off-by: Christian Kapeller <christian.kapeller@cmotion.eu>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
the phy reset neet to be done before the fec driver is registered
as we accesst the phy at the fec probe time
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In the nios2 generic board generic.c file, use the
new barebox_add_memory_bank to init ram memory.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
the rm9200 have a errata the cs0 must be used via hw cs not gpio
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Switch to new environment and add the bootscripts needed for mmc. Also,
update defconfig for new environment.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Needed so that the linker can throw it away when unused. This is needed
at least on current master for being able to enable pbl support for omap3
boards.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds generic board support (CLEP7212, Linux ARM ID=91)
for CLPS711X-target.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a simple serial driver for CLPS711X architecture.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds new architecture (CLPS711X) into barebox.
The core-logic functionality of the device is built around an ARM720T
processor running at clock speeds up to 90 MHz.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The idea of having /env/init/* scripts was to make the configuration
more flexible and customizable for boards. It turned out though that
people (including myself) do not find the place where they should
change these settings.
So this patch brings back /env/config for defenv-2. The individual
env/init/* scripts are removed and their content is added to
/env/init/config-board. This makes the values from /env/init/config-board
the board specific defaults which can be overwritten in /env/config.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The added complexity of bootargs-ip-* and bootargs-root-* makes
understanding defenv-2 more complicated. remove them and open
code the scripts instead in their users.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The same issue was fixed in the Linux kernel in commit
66ddfc6 (mx35: add a missing comma in a pad definition)
for 2.6.33-rc7.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
barebox size is 384KiB
and for the official atmel release we need to rootfs at 8M
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Took the mx28evk defconfig, activated DMA and NAND, used savedefconfig;
this patch is the result.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
While flash layout may be custom, at least the nand0-device is good to
have.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These routines can fail, add support for that. Also, put in missing
copyright headers.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
now we can flash barebox by itself as the bootstrap need to use pmecc
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch is from linux 3.7-rc1 and adapt to Barebox
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Otherwise we get the following warning when sdl is not installed
on the compile host:
Package sdl was not found in the pkg-config search path.
Perhaps you should add the directory containing `sdl.pc'
to the PKG_CONFIG_PATH environment variable
No package 'sdl' found
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We support two different board revisions, both of which only differ
in the dcd table, so we can support both in a single binary with the
cost of storing both dcd tables in the binary.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for an update handler for internal boot. Currently
handled are:
- v1 MMC/SD
- v2 MMC/SD
- v2 NAND
where v1 is found on i.MX25, i.MX35 and i.MX51. v2 is found on i.MX53.
This code intentionally does not use the DCD data compiled into every
i.MX internal boot image. This makes it possible to make a pure second
stage barebox bootable on i.MX internal boot devices later.
This has been tested on the i.MX51 babbage, i.MX53 loco and i.MX53 tx53
board.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The KARO Tx53 board in the revision 8030 has an instable SDRAM
setup. It works as long as the MMU is disabled, but the board
crashes at arbitrary places once the MMU gets enabled. So we
need the PLL setup early. Enable it for pbl.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Jean-Christophe PLAGNIOL-VILLARD
Wjatscheslaw Stoljarski (Slawa)
Teresa Gámez
Jan Luebbe
Sascha Hauer
Alexander Shiyan
Maxime Ripard
Antony Pavlov
Wolfram Sang
Fabio Porcedda
Robert P. J. Day
Christian Kapeller
Enrico Scholz
Vicente Bergas
Christian Hemp
Christoph Fritz
Franck Jullien
Uwe Kleine-König
Carlo Caione