this will allow to configure the nand as example
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When CONFIG_OMAP_BUILD_IFT is selected, the
target image name was set to "barebox.bin.ift".
This file must be renamed "MLO" before it can
be used on the SD card.
Make this as default behavior.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enable the flag HAVE_NOSHELL to allow first stage
bootloader to be built for this board.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The base address passed for device "omap-hsmmc" was
incorrectly passed as OMAP_I2C1_BASE and the base
address for device "i2c-omap" was hardcoded to
0x4809C000 which, in fact, refers to OMAP_MMC1_BASE.
Similarly, in call to add_usb_ehci_device(), addition
is not required if right base address is used.
In fact, 0x48064700 (used as base in the addition)
falls in the OHCI Address space.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The config option CONFIG_GPMC is renamed to
CONFIG_OMAP_GPMC as result of this commit:
819f416b86
Still, sources continue to use CONFIG_GPMC.
Fix it.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use ds3 for heartbeat and ds5 for dfu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
on 9269 and 9g20 the sram are mirrored at then of the bank so we can join them
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without num_modes the imx fb driver won't work. Specify this
in the boards and also bail out in the driver when num_modes
is unspecified.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Using SSP1 since this is the default configuration.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this was introduced in "6b3e01a arm: eukrea: Fix compilation warning"
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
enable serial and dfu at the same time
senario if the usb device is plugged and the BP is not pressed at boot time
during 5s the usbserial will be enable
disable zlib support to fit in the 256K
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The lowlevel init function was a 1:1 copy from the babbage
baord, so it should be safe to switch to the generic C
lowlevel init.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Eric Benard <eric@eukrea.com>
Reimplement the code from lowlevel.S in C. It is run
from SDRAM anyway, so we can safely do this initialization
in a regular barebox environment instead in Assembly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- move code which can be shared between i.MX53 and i.MX51
to a common file
- rename mx53_init_lowlevel to imx53_init_lowlevel
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
a) use the more CPU specific S3C* macro names
b) move the register description out of the way, as more recent CPUs using a
different layout and more features
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Keep common code in the MACH instead of re-inventing it in each platform.
Also use S3C* macros for all memory related register.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The UART is one of the units which differs only slightly inside the S3C family.
Prepare this driver to share it with more recent CPUs.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
After separation and after all S3C macros are now present, change the driver
to be more generic for future additions.
The timer registers in the S3C24XX family are only 16 bit wide. But these
registers can be read and written in a 32 bit manner. This is important to share
code with more recent CPUs which comes with 32 bit registers.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Most members of the S3Cxxxx family share similar timer units. But they are
not really register compatible. To reflect this, use a separate name space for
the S3C family.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch just move the clocksource functions out of the generic.c source file
to handle it on a per CPU base later on.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There are major differences in the clock tree of the S3C24xx family and the
more recent CPUs of the S3C family. Keep the S3C24XX clock routines separate to
avoid an ifdef hell. But also use generic function names to be able to
share drivers among the S3C family.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This LCD driver is for the LCD controller in the S3C2410/S3C2440 CPUs only.
Change its name to reflect its usage and free the way to add LCD controller
drivers for more recent Samsung CPUs.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The aready existing NAND controller driver in Barebox is for the S3C24XX family
only. Change the name of the file to reflect this fact (and free the way to add
more recent Samsung NAND controllers)
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Start with renaming files to share them in the S3C CPU family,
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The S3Cxxxx family consists of ARMv4, ARMv5 and ARMv6 types of CPU cores. The
S3C24xx sub family is only one of it. To be able to handle all CPUs in one mach
directory, use a more generic name for it.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds basic support for the mx28-evk board. Debug UART, MMC and FEC
have been successfully used.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Recent gcc generates code with unaligned access when architecture
supports it. Setting A bit unconditionally causes data-aborts on such
code rendering barebox unusable.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When executing 'bl' in inline assembler, the 'lr' register must be
marked as clobbered too.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In this generic configuration, the board can be run in the
or1ksim simulator with the linux configuration file using
the UART to print the console.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
OpenRISC is the original flagship project of the OpenCores community.
This project aims to develop a series of general purpose open source
RISC CPU architectures.
A team from OpenCores provided the first implementation, the OpenRISC
1200, written in the Verilog hardware description language.
Even though I should have created an mach-or1200 directory, it is not
necessary for now. The OpenRISC 1200 CPU is the only one available and
it will be for some time.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
detect it at boot time
if the user button is pressed 5s and the vbus is 1 start the dfu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
drop irq id and rebase instead of of offset
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this device controller is present on rm9200/9260/9g20/9261/9g10/9263
the 9g45 use an other IP
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Support the setup of the mmc voltage, when booting OMAP4 with twl6030
from nand.
Signed-off-by: Alexander Aring <a.aring@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Added i2c support for omap4. Tested on pcm049.
Driver based on linux kernel implementation.
Also added a shift to access 16-bit registers
to make support for OMAP730/850 possible.
If accessing a non existing slave the bus will go into arbitration mode.
It's unable to recover from it.
Signed-off-by: Alexander Aring <a.aring@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add a function to remap an IO range into a virtual addresses
range. This is particulary usefull for the few devices
mapped at physical address 0, as the MTD boot devices.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The device resources are much smaller, the resource mechanism
revealed this because of overlapping devices.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The icache command is unused. Instead of adding it to compilation
again, remove it as the cpuinfo command provides the same information.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
configure BP4 and BP3
use BP4 to start DFU mode at boot
if BP4 is pressed at boot time and maintain at least 5s the dfu is started
otherwise we boot normaly
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
by default boot from nand with the bootstrap as first stage
update the smc config for 9g20-ek
switch to defaultenv
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that we have a bootm command which boots everything we can
simplify the defaultenvironment. We can call bootm on every
image type and can remove the kernelimage_type variables.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This switches the bootm code to the new uimage code. Also
bootm can now handle other types of images than uImages.
Currently the only architecture making use of this is
arm which allows to boot zImages, raw images and barebox
images.
I intended to make a more bisectable series from this but
I failed becuase there are many dependencies and no matter
how I tried the patches grew bigger and and bigger. So I
decided to put this all in a single patch.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
whoever calls this function is not necessarily aware of a struct
image_data, so remove the dependency from the function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Support for the old DM9000E device is now part of the new dm9k.c driver. So,
remove the old driver source and switch all users to the new driver.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The device resources are much smaller, the resource mechanism
revealed this because of overlapping devices.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
on at91sam9 you need to shutdown the sdram/ddr controler before reseting
when you boot from nand
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Newer pcm038 are populated with a PC28F256P30BFE NOR-Flash.
This flash requires different CS values.
The values also work with older NOR-Flashes.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add all available video modes to the framebuffer. devinfo fb0
shows the available modes. We can select a mode now.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
a temporary setting was inserted in the default env by error
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
without this, the pins seems to be opendrain and thus the LCD signals
are not properly driven leading to wrong colors on the screen.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add the platform data for MMC/SD card host on the PXA SoCs.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add mmc clock frequency reader. Easy as MMC host controller
is constant, while the clock between host and card is
settable.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will allow to execute a program of the host from barebox
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adapt mainline kernel pxa27x_udc driver to barebox :
- remove function header comments as they are in mainline
- test it with serial gadget
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The core support was brought by Marc and Sascha.
The cache choice was fixed by Luotao Fu.
Some gpio and devices addons were provided by Robert.
Signed-off-by: Luotao Fu <l.fu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Barebox cannot boot the recent mainline Linux kernels for the
i.MX21ADS board anymore when using TFTP, because the heap is too
small.
This is solved by increasing the heapsize to 5Mbyte.
Signed-off-by: Jaccon Bastiaansen <jaccon.bastiaansen@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All handlers used to just relocate the image without any checks, so
we are doomed if we write outside of SDRAM or will overwrite ourselves.
Move the relocation up to the generic part where we have a chance
of catching these issues.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that the arch_number and system_rev variables can be set from
the environment we don't need the old bootm command line switch
mechanism anymore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arch_number is currently exported to the environment but not read back
on boot time which is rather confusing. system_rev and system_serial
are not exported to the environment but can be set in board specific
code.
This patch exports all these variables to the environment and reads them
back on boot time. All variables get a armlinux_ prefix, so the
arch_number environment variable gets renamed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We never had interrupt support in barebox and we have no plans to
add interrupt support. Even if we do I doubt the current fragments
of irq support are helpful, so remove them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Rename create_section into create_sections, as the function
is used to create multiple sections, and in particular it
creates the 4096 sections of 1MBytes to have a 1:1 flat
mapping of the 4GBytes address space.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These symbols where defined for the A9M2440 platform. Rename them to the
platform they now belong to.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Linux kernel says (spi.h) :
* All SPI transfers start with the relevant chipselect active. Normally
* it stays selected until after the last transfer in a message. Drivers
* can affect the chipselect signal using cs_change.
*
* (i) If the transfer isn't the last one in the message, this flag is
* used to make the chipselect briefly go inactive in the middle of the
* message. Toggling chipselect in this way may be needed to terminate
* a chip command, letting a single spi_message perform all of group of
* chip transactions together.
*
* (ii) When the transfer is the last one in the message, the chip may
* stay selected until the next transfer. On multi-device SPI busses
* with nothing blocking messages going to other devices, this is just
* a performance hint; starting a message to another device deselects
* this one. But in other cases, this can be used to ensure correctness.
* Some devices need protocol transactions to be built from a series of
* spi_message submissions, where the content of one message is
* determined by the results of previous messages and where the whole
* transaction
* ends when the chipselect goes intactive.
In other words, cs_change changes the default chipselect *behavior*.
Support of cs_change is necessary to implement the mci spi driver.
This patch also fix few things:
Passing the bus number to the brand new master device.
Disable chipselect during master->setup.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
now we can detect the host build from gcc macro
and cross compile the sandbox
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Loïc Minier <loic.minier@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
nand.c issues a warning when imx_nand_set_layout is
empty. We don't need this function on i.MX53, so
silence the warning.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The S3C2440 CPU comes with an internal OHCI the generic part of
Barebox already supports. Just add the missing part.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The size is being calculated after changing to another section, which
gives error with gcc 4.6:
AS arch/x86/lib/traveler.o
/tmp/ccP0z8xx.s: Assembler messages:
/tmp/ccP0z8xx.s: Error: .size expression for real_to_prot does not evaluate to a constant
/tmp/ccP0z8xx.s: Error: .size expression for prot_to_real does not evaluate to a constant
make[1]: *** [arch/x86/lib/traveler.o] Error 1
Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently, there are multiple definitions of run_shell()
for each board that can be build in "xload" configuration.
Now there is only one function used by all boards.
The functions defined in xload.c are used only when "xload"
configuration used; but it gets compiled unconditionally.
This has been fixed as well.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
let the linker to provide the basic linker script
just insert the commands and initcalls before the .rodata section
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
today we have the same linker script in board and lib
and only the board linker script is used
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If the user has parsed a tree, we start Linux using the
device tree, otherwise we use the traditional ATAG
mechanism.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When building sandbox with ccache, one would hit warnings such as:
warning: 'struct mmsghdr' declared inside parameter list
on random files; a way to reproduce this issue is to build a simple
file doing just:
#include <sys/socket.h>
int main(void) {
return 0;
}
gcc -Wall -P -c -o foo foo.c
But actually the -P flag is only useful when generating non-C files,
such as linker scripts in the case of barebox. Removing the -P flag
from all the gcc invocations, except when generating .lds files makes
the warning go away. It turns out that this is what
linux/scripts/Makefile.build also does nowadays.
Signed-off-by: Loïc Minier <loic.minier@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Running the 'bootz' command always fails with
could not read <some file>
due to wrong usage of pointers and structures. This is the second try to fix
the 'bootz' command. At least on my target it is now be able again to load a
kernel without any error.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Running the 'bootz' command always fails with
could not read <some file>
due to it loads only a size of a pointer, instead of the size of the expected
header structure.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch remove those warnings in nios2 drivers:
include/io.h:7:5: warning: "__BYTE_ORDER" is not defined
include/io.h:7:21: warning: "__BIG_ENDIAN" is not defined
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Contrary to other Atmel boards, the AT91SAM9M10G45EK board file only
describes the case where NAND is used as the storage for Barebox and
its environment. Therefore, it makes sense to enable the Atmel NAND
driver in the default configuration for this board.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The environment partition was overlapping the Barebox partition in
those three Atmel boards. Saving the environment resulted in the
Barebox being overwritten.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We switched to resources recently and the nand controller
of the i.MX53 needs two of them, so fix the helper in the
same way as the i.MX51
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds lowlevel (AIPS, PLL, L2) initialization for i.MX53 boards.
This is a direct transcription of Freescales U-Boot assembler code
with the exception that we initialize PLL1 with 1000MHz and assume
that all necessary voltages are already adjusted when we arrive here.
It must be explicitely called from the boards so a board is free to
do it's own initialization. However, boards should use this code
and make it more configurable if necessary.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fixes alignment for the "System Type" menu entry.
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
tested on imx53 loco board with a Multi uImage file
generate like this
mkimage -A arm -O linux -T multi -C none -a 0x70008000 -e 0x70008000 -n Linux-2.6.35.3-00745-gce4c61a-dirty -d zImage:rootfs.cpio.lzma uImage.Multi
and boot via bootm
bootm -r @1 -L 0x72000000 /dev/ram0.kernel
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This fixes the following compile errors
arch/arm/mach-at91/at91sam9g45.c:185:3: error: 'ohci_clk' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9g45.c:186:3: error: 'tcb1_clk' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9g45_devices.c: In function 'at91_add_device_mci':
arch/arm/mach-at91/at91sam9g45_devices.c:258:2: warning: implicit declaration of function 'at91_clock_associate'
[...]
arch/arm/mach-at91/built-in.o: In function `at91_add_device_mci':
sam9_smc.c:(.text.at91_add_device_mci+0x1d0): undefined reference to `at91_clock_associate'
arch/arm/mach-at91/at91sam9260_devices.c: In function 'at91_add_device_mci':
arch/arm/mach-at91/at91sam9260_devices.c:251:2: warning: implicit declaration of function 'at91_clock_associate'
which were introduced in commit:
"at91: swtich to clkdev" (ae19fe26cc)
Signed-off-by: Hubert Feurstein <h.feurstein@gmail.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is required to avoid warnings like this:
In file included from <some file>:
include/io.h:7:5: warning: "__BYTE_ORDER" is not defined
include/io.h:7:21: warning: "__BIG_ENDIAN" is not defined
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This brings consistency to the way variables are named and used
according to the Freescale documentation. Also, since user is
supplying row indicies, and not offsets, it's reasonable to amend the
error message accordingly.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds additional Kconfig help to clarify the way to use barebox
for eFuses handling.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
/dev/self0 and /dev/env0 are in the last MB of nor flash. The
offset depends on the size of the flash, so detect this at
runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We introduced several new functions to ease our life
on ppc, use themn on the pcm030:
- setup iomux and bus clocks in board code
- add sdram memory according to detected size
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The old startup process consisted of several CFG_LOWBOOT,
CFG_RAMBOOT ifdeffery which I do not understand. So remove
all this and replace it with:
- put the entry point for second stage loaders to offset 0x0
so that we can do a go /dev/ram0 to start a second barebox
- When we come from the reset vector assume MBAR is at 0x80000000
- When we come from the second stage entry assume that
SPR 311 is in sync with the current MBAR address.
- Switch MBAR to 0xf0000000 and we are done.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This has never been used in barebox and likely is incomplete
and bitrotted over time, so remove it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
By doing this we can remove the ptes field in struct arm_memory
which won't be present in a generic memory bank structure anymore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To allow for some generic io accessors introduce io.h and use
this instead of asm/io.h throughout the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The nand controller on i.MX51/53 uses two base addresses. Instead
of hardcode the second address use the new shiny resources two specify
it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Based on the Linux driver. Tested with m25p80 with CS in GPIO mode.
Clock setting support is ad-hoc as the corresponding mach is not using
the generic clock infrastructure.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This fixes the following compile errors
arch/arm/mach-at91/at91sam9g45.c:185:3: error: 'ohci_clk' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9g45.c:186:3: error: 'tcb1_clk' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9g45_devices.c: In function 'at91_add_device_mci':
arch/arm/mach-at91/at91sam9g45_devices.c:258:2: warning: implicit declaration of function 'at91_clock_associate'
[...]
arch/arm/mach-at91/built-in.o: In function `at91_add_device_mci':
sam9_smc.c:(.text.at91_add_device_mci+0x1d0): undefined reference to `at91_clock_associate'
arch/arm/mach-at91/at91sam9260_devices.c: In function 'at91_add_device_mci':
arch/arm/mach-at91/at91sam9260_devices.c:251:2: warning: implicit declaration of function 'at91_clock_associate'
which were introduced in commit:
"at91: swtich to clkdev" (ae19fe26cc)
Signed-off-by: Hubert Feurstein <h.feurstein@gmail.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
from linux
commit 8251544f9e28058e54c4f35b7cd13b0d191d7555
Author: Ryan Mallon <ryan@bluewatersys.com>
The uhpck clock should be divided from the utmi clock, not its parent
(main). This change is mostly cosmetic as the uhpck rate value is not
used anywhere except for the debugfs clock output.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we can dynamise the boot depending on the machine
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit c71a77ab8 (ns16550: switch to resource) has introduced generic
read/write access to 16550 register and a 'shift' parameter to allign
register index to physicall registers.
The correct 'shift' value was missing in all omap based boards.
Corrected this to 2 which has fixed the problem.
Tested on a PCM-049 phyCORE-OMAP4 board.
Signed-off-by: Juergen Kilb <J.Kilb@phytec.de>
Tested-by: Jan Weitzel <J.Weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This helper function can be used for automatic
SDDR configuration based on register settings
made by a previously first stage bootloader
i.e. x-loader.
Signed-off-by: Juergen Kilb <J.Kilb@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add platform data to specify maximum frequency of hsmmc interface
which can be restricted due to external level shifters.
Signed-off-by: Juergen Kilb <J.Kilb@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
commit 7d25a0552dd3a4b65412ae1cbf8f9ca8a88b5d27
Author: Juergen Beisert <jbe@pengutronix.de>
Date: Thu Nov 25 17:49:11 2010 +0100
Keep frequency multiplier enabled to be able to do a warmstart
The wachtdog's reset does only reset the ARM core, not the whole silicon.
But the PLLs seems to do some strange things: It seems they switch back to
the low frequency reference when the watchdog barks. But in the case the
frequency multiplier is off (not used due to 26 MHz reference usage) the
machine stops, because the PLLs are stopping due to the lack of a reference
frequency. As the power on reset will set the FPM_EN bit again, a power cycle
brings the machine back to life.
By keeping the frequency multiplier enabled, also a warmstart triggered by the
watchdog can restart the machine now.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Jean-Christophe PLAGNIOL-VILLARD
Sanjeev Premi
Sascha Hauer
Juergen Kilb
Wolfram Sang
Eric Bénard
Juergen Beisert
Enrico Scholz
Franck Jullien
Alexander Aring
Robert Jarzmik
Daniel Mack
Teresa Gámez
Christian Hemp
Michael Grzeschik
Antony Pavlov
Robert Jarzmik
Marc Kleine-Budde
Jaccon Bastiaansen
Lucas De Marchi
Fabio Estevam
Loïc Minier
Thomas Petazzoni
Alexander Shiyan
Robert Schwebel
Hubert Feurstein
Paul Fertser