The voltage for programming the fuses is external to the SoC and
on some boards this is controllable with a regulator, so add regulator
support to the iim driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Allow to read/write the registered MAC addresses in the iim
module directly via a device parameter.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX5 iim has an additional bit in the CCM module which
enables the supply. Add support for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
imx_iim_read is a iim internal function, so access the
internal functions rather than using the cdev API.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With devicetree devicenames start with numbers. Parameters on these
devices are not accessible since variables can't start with numbers.
Register a logical 'iim' device which makes the permanent_write_enable
and explicit_sense_enable parameters accessible again.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of duplicating data shared between the banks in a bank
specific struct, use a iim struct and a bank struct.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add the clocks for the IPU on i.MX5. Since these are many only
add them when the driver is enabled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i.MX5 has clock number defines in dt-bindings, use them rather
then manually keeping the clock enums in sync.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX barebox update handlers take an optional dcd table as argument.
This can be used to add the correct dcd data to the image before flashing
it.
This mechanism is quite complicated and largely unused, so remove it. With
this it is only possible to flash the exact image passed to barebox_update,
which is what is mostly done anyway.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If we have two discontinuous memory banks we want to move
the malloc area into the upper bank by default to leave as
much free space in the lower bank, where we have to place
kernel, oftree and initrd.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Mostly to make it clear that boarddata needs to be
something we can dereference.
As this is a pretty invasive change, use the opportunity
to make the signature 64bit safe.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
FUSEs (OTP registers) can be written via /dev/imx-ocotp character device.
For example, writing MAC 12:34:56:78:9A:BC can be performed as
> mw -l -d /dev/imx-ocotp 0x8c 0x00001234
> mw -l -d /dev/imx-ocotp 0x88 0x56789ABC
and reading as
> md -l -s /dev/imx-ocotp 0x88+8
00000088: 56789ABC 00001234
, where 0x88 (0x22*4) and 0x8C (0x23*4) are offsets of MAC OTP registers.
Notice: FUSEs are PROM, so "0" (unprogrammed) bits
can be replaced with "1" (but not vice versa) only once.
Also, for MAC there are convinient parameters:
> ocotp0.permanent_write_enable=1
> ocotp0.mac_addr=12:34:56:78:9A:BC
imx_ocotp 21bc000.ocotp: reloading shadow registers...
imx_ocotp 21bc000.ocotp: reloading shadow registers...
> echo $ocotp0.mac_addr
12:34:56:78:9A:BC
Signed-off-by: Uladzimir Bely <u.bely@sam-solutions.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move the imx6-reg.h include to the imx6-mmdc header.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for Phytec phyCARD-i.MX6.
- 1GB RAM on two banks
- 1GB RAM on one bank
- 2GB RAM on two banks
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this board is produced by Embest/Element 14 and is based on i.MX6 Solo
The following features are tested :
- UART2 (console)
- eMMC
- SDCard
- uSDCard
- Ethernet
- USB Host (through 4 ports hub)
- I2C 1/2/3
- 2 LEDs
Boot on eMMC and through USB loader are tested.
For more informations on this board : http://www.riotboard.org/
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a clk_gate_flags argument to clock gate creation functions
to allow the introduction of new clock gate modifiers.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To reduce the devicetree files for one board with different memory sizes the
memory size can be read back from i.MX6.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This most likely doesn't fix any real bugs, but it's the
right thing to do and reduces the noise level with static
checkers.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is needed so that the IPU framebuffer scanout cannot be
starved by VPU or GPU activity.
Some boards like the SabreLite and SabreSD seem to set this in
the DCD already, but the documented register reset values do not
contain the necessary settings.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds the IPU, LVDS and HDMI clocks. As these are many, depend
on the IPU driver being compiled in.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The mx31moboard is used on the marXbot, Eyebot and Footbot robot.
Signed-off-by: Philippe Rétornaz <philippe.retornaz@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch gates the clocks to GPU, IPU, and VPU units by default,
significantly reducing the VDDSOC power draw while barebox is running.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Lucas Stach
Uladzimir Bely
Christian Hemp
Eric Bénard
Beniamino Galvani
Lucas Stach
Wjatscheslaw Stoljarski
Philippe Rétornaz
Philipp Zabel