Add functions to access the OCOTP fuses field wise, similar to what has
been done for the IIM. Also add a i.MX6 fusemap header file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When CONFIG_OFTREE is enabled the appended device tree is unflattened
and put into data->of_root_node, but there it is never used again.
To actually use the appended device tree put it into data->oftree
instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Make access to the mc13892 charger parameter voltage, current and max power
dissipation readable in terms of millivolts, milliamps and milliwatts.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This was missed when updating all the partition sizes. The
environment partition has been moved to the correct location,
but the barebox partition size remained unchanged.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We need to add the spi aliases to set the bus number correct in
the driver.
Delete the spi1 alias again in the am33xx-strip.dtsi for MLO as
the node is deleted there also.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
EEPROM information is needed in barebox.bin in order to setup MACs and
select appropriate DTB from kernel-fit.itb, so disable this initcall
in MLO.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When a initrd is given we calculate the next free memory position
as:
free_mem = PAGE_ALIGN(initrd_end);
This is wrong when initrd_end exactly falls on a page boundary.
In this case PAGE_ALIGN() does nothing and free_mem becomes
initrd_end and the following bootm_load_devicetree() and thus
booting fails with -ENOMEM.
Fix this by correctly advancing to the next free memory position.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The defconfig files are long untouched and a
make xy_defconfig; make savedefconfig usually generates quite
a different looking file. Refresh them to make it easier to generate
patches against the configs using
make xy_defconfig; make menuconfig; make savedefconfig
This has been done with the following script.
for a in arch/*; do
arch=$(basename $a)
for c in $a/configs/*; do
config=$(basename $c)
export ARCH=$arch
make $config && make savedefconfig && mv defconfig $c
done
done
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Auvidea H100 is a baseboard for the SolidRun MicroSOM, which
provides HDMI IN/OUT capabilities.
Currently supported is only a combination of the H100 baseboard
with a i2eX MicroSOM.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of hardcoding the different RAM sizes.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
So far it was hardcoded for each board if defenv-1 or defenv-2 is used.
Make this a user choice so that a particular board no longer enforces
a defenv type.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently it's hardcoded for each board which defaultenv version is
used. This is unfortunate since some people like the other defaultenv
version better and may want to select it.
This patch removes the board specific environment path
CONFIG_DEFAULT_ENVIRONMENT_PATH and instead adds it via:
if (IS_ENABLED(CONFIG_DEFAULT_ENVIRONMENT_GENERIC))
defaultenv_append_directory(defaultenv_<board>);
This way we can make sure that the defaultenv-1 board specific bits are
only compiled in when defaultenv-1 is actually in use.
The next step is to make the defaultenv version selection a user visible
choice.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
OnRISC Baltos devices are based on a am335x SoC and can be booted
either from MMC or NAND.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM64 has native instructions for division and thus doesn't need the
helper functions implemented in those files.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Don't allow it to be selected in a ARM64 build.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The unwind code to support this feature is not there yet.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We don't yet have an implementation for those two features on ARM64, so move
them to a place where they are only selected for a 32bit barebox.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current ARM64 lowlevel code needs the exception vector to set
up all the ELs. Select ARM_EXCEPTIONS to make sure this is always
present.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Register imx6_fixup_cpus() for MX6Q+ as well as for MX6Q and MX6DL.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Factor out CPU revision identification code from imx6_init() into a
standalone inline function (similar to imx6_cpu_type()), so that it
would be possible to use that functionality in PBL code.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The 'nv' command can add/remove multiple variables. Implement that
for the 'global' command aswell. Also with the 'nv' command the -r
option is for removal of variables, not for "set match". Looking at
the users of "global -r" the only user uses the command for removal
of variables and not for "Setting multiple variables to the same value"
as stated in the command help text. Let "global -r" remove variables
aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since ce6755ca1c, both IPU and OpenVG are
enabled if CONFIG_DRIVER_VIDEO_IMX_IPUV3 is true, but in the other case,
only OpenVG was disabled.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These registers are already set by imx6_ccm_probe (in clk-imx6.c) during
core_initcall, while imx6_init_lowlevel is only called during
postcore_initcall via imx_init in imx.c.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The NoC regulator only passes the QoS signals through if it is
in bypass mode. This is a safe setting to give the IPU priority
over other requests. The kernel may change it to some other setting
once it knows the bandwidth requirements of the use-case.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
SX and SL variants only include the PXP and have no IPU, so
skip any IPU related QoS setup.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Split into separate function and only call it after the chip type
and revision is known.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The image built with vincell_defconfig has become too big to fit
into the SoC internal SRAM. Make it smaller by disabling UBIFS
support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that we can start images bigger than internal SRAM size we can
enable the Vincell support in the imx_v7_defconfig.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Vincell boards do the SDRAM setup from board init code, so the
image size is limited to the internal SRAM size. To overcome this
limitation use the NAND xload support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some i.MX53 want to setup the SDRAM from C code rather than
from DCD tables. The image size for these boards is limited
to the internal SRAM size. To overcome this limitation for
i.MX53 boards booting from NAND implement an xload mechanism
to load only the PBL to SRAM and let barebox load the rest
of the image itself after SDRAM has been initialized.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move v3 register definitions to include file so that they can
be reused for the early nand boot code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The regular bootsource functions only work in a running barebox,
provide functions for early code. This has already been done for
i.MX6, this patch adds the same functions for the other SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The functions can determine the necessary base addresses
themselves since they are SoC specific anyway.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The bootloader partition size was increased to 0xe0000, so adjust
the barebox update handler partition size accordingly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The phy reset for the Vincell board is done from device tree whereas
the Vincell-LT resets the phy from board init code. Since both boards
share the same code base the regular Vincell board ends up with a
duplicated phy reset, with the second reset being done after the
FEC has been initialized.
Fix this by removing the phy reset from the board code and adding the
phy reset to the Vincell-LT dts file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
None of the available boards for mvebu has any environment additions, so
this is safe.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is the result of
make mvebu_defconfig
make savedefconfig
mv defconfig arch/arm/configs/mvebu_defconfig
.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The check for is_imx6q was introduced initially in
f1f6d76370 ("ARM: i.MX6: correct work flow of PFDs from uboot-sources")
to differentiate between i.MX6DL+i.MX6SL and i.MX6Q. The i.MX6D must be
handled like the latter, so drop the check. i.MX6DL+i.MX6SL can be
ignored here since since
a665962824 ("imx6: lowlevel_init: Fix workaround for new i.MX6s chips")
the PFD handling is only done for i.MX6DQ.
Update the comment to be not only logically correct but also helpful.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arm_mem_barebox_image() is used to pick a suitable place where to
put the final image to. This is called from both the PBL uncompression
code and also from the final image. To make it work properly it is
crucial that it's called with the same arguments both times. Currently
it is called with the wrong image size from the PBL uncompression code.
The size passed to arm_mem_barebox_image() has to be the size of the
whole uncompressed image including the BSS segment size. The PBL code
calls it with the compressed image size instead and without the BSS
segment. This patch fixes this by reading the uncompressed image size
from the compressed binary (the uncompressed size is appended to the
end of the compressed binary by our compression wrappers). The size
of the BSS segment is unknown though by the PBL uncompression code,
so we introduce a maximum BSS size which is used instead.
The code before this patch worked by accident because the base address
of the final image was aligned down to a 1MiB boundary. The alignment
was sufficient already to make enough space. This breaks though when
the uncompressed image including BSS becomes bigger than 1MiB while
the compressed image is smaller.
Fixes: 65071bd0: arm: Clarify memory layout calculation
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Makefile compression commands all append the size of the
uncompressed image. With CONFIG_IMAGE_COMPRESSION_NONE simply
'shipped' is used which does not append the size. Add and use
a special comp_copy function which adds the size. This helps
us to get the uncompressed image size in the startup code later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enable parent rate propagation for clk_gate2 to allow the
clock consumers to adjust their rates.
One effect of this is that the i.MX6 NAND controller now can adjust
its rate. It already called a clk_set_rate(rate, 96000000), but this
had no effect, so the clock stayed at reset default 24MHz resulting
in a rather slow timing. This became a problem when commit
"1daa3bc mtd: nand_mxs: Setup timing" introduced EDO timing mode for
faster NAND chips. EDO mode can only work properly for cycle times
< 30ns (at least that's specified in the ONFI spec). 1daa3bc resulted
in sporadic NAND read errors on some boards.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sam Ravnborg <sam@ravnborg.org>
As a i.MX6dl board dts imx6dl-tx6u.dts should include imx6dl.dtsi, not
the i.MX6q variant. This fixes various pinctrl problems.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move all MX5 clock functionality which does not apply to i.MX50 to
a new mx51_mx53 related function.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Of_unflatten_dtb returns a ERR_PTR value so checking it against NULL is
incorrect. Fix it in all of the places where this was happening.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The phyCORE-RK3288 aka PCM-059 is a SoM (System on Module)
containing a RK3288 SoC. The module can be connected to different
carrier boards.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To be able to use PBL console do the usual
relocate_to_current_adr()/setup_c() dance and call pbl_set_putc() to
tell the PBL console where the UART is.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The second level page tables can only start at a 1MiB section boundary,
so instead of calling arm_create_pte() with the high vector address
(which is 0xffff0000, not 1MiB aligned) we have to call it with
0xfff00000 to correctly create a second level page table.
The old values broke SoCs which have peripherals in the upper 1MiB
area, like for example the Atmel AT91RM9200. On these Socs we correctly
created the vector page, but the pages around it did not have a 1:1
mapping anymore which led to unreachable peripherals.
Fixes: f6b77fe9: ARM: Rework vector table setup
Reported-by: Peter Kardos <kardos.peter.sk@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Peter Kardos <kardos.peter.sk@gmail.com>
The *-menu-add-entry functions no longer exist in defaultenv-2, so
remove the calls to these functions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some boards duplicate the PS1 initialization to add a '#' at the end
of the prompt. It's not worth duplicating this for this purpose. Remove
them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The RK3288 SoC is a low power, high performance processor for mobile phones,
personal mobile internet devices and other digital multimedia applications.
It has an integrated quad-core cortex-A17 with separate NEON coprocessor.
Prepare mach-rockchip infrastructure for Rockchip RK3288 support.
Let's seperate the RK3188 and RK3288 SoCs. Later we will have two different
configs.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
'clean' target is listed on 'no-dot-config-targets' list in main
Makefile so that conditional statement would yeild the same result
every time. Given how CLEAN_FILES are rm'ed with -f there should be no
harm in specifying them both unconditionally.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
CONFIG_CPU_V8 is checked against 'y' and 'n', but the case when the
variable is unset is not considered.
This patch only checks the variable against a single value 'y' so the
logic is always coherent even when the variable is unset.
Signed-off-by: Vicente Bergas <vicencb@gmail.com>
Tested-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This creates an image that can be booted via USB.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX31 SPI interface was refered by freescale as spi_ver_0_4 in one
of their older vendor extended linux releases. spi_ver_0_4 differs only
in minor aspects to spi_ver_0_7 (i.MX35) which is already supported by
barebox.
Regarding barebox, the differences boil down to the location and length
of the CHIP SELECT and BIT COUNT/BURST LENGTH elements of CONREG. The
spi_ver_0_4 variant is limited to single word bursts with a maximum of
32 bits_per_word.
Add support for the i.MX31 SPI interface to the barebox spi_ver_0_7
implementation.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that the MAX variant of the board is also supported by the
same code, rename the board directory to the more generic nitrogen6.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Nitrogen boards don't need it and it's actively wrong
on the 4GB variants of those boards.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Saves some boilerplate code by calculating the DRAM size
automatically.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This gets rid of the (mostly) stub top level DTs in barebox
and switches the compatible to the proper "boundary" one.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Barebox and kernel version diverged therefore bring the device tree up to date
with respect to the kernel being the reference.
Signed-off-by: Ulrich Ölmann <u.oelmann@pengutronix.de>
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The majority of the stuff currently in include/boot.h is about bootm
code implemented common/bootm.c. To be more consistent move it to a
new file include/bootm.h.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Register regmap against orignal device passed to probe, this way further
in the code/call-chain cdev's device_node will be correctly populated
and it will be discoverable via cdev_by_device_node()
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Register the board specific environment during runtime using
defaultenv_append_directory(). Also this patch updates default config.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Refactoring of CLPS711X CLK driver code to be compatible with
the current kernel. This change a bit makes easy of initializing
devices using CLKs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
CS3 is used for a variety of external bus devices.
Increase the wait state for this chip select for the possibility
of more widespread use.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We store kernel and oftree in static UBI volumes now. No need
for seperate partitions any more.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Amazon Model No. D00901 Kindle3 is an E-Book reader based on the
i.MX35 SOC. The device boots in internal boot mode from a build-in eMMC,
alternatively the device may be set into USB-downloader mode when the
Vol+ key is pressed on startup.
Add support for this device and make barebox a drop-in replacement for
the factory shipped u-boot image.
Constraints for the use as drop-in replacement:
- imximg header (offset 0x400) has a maximum size of 2kB minus 16 byte
since the last 16 bytes are used to store a vendor specific hardware
desctription identifier
- the bootloader space (application plus env) is limited to 256kB minus
16 bytes when installed with offset of 4kB (the u-boot offset was 3kB).
A vendor specific device identifier is stored in the gap between
application and kernel. The vendor specific identifiers should not
be overwritten.
Notable features:
- Support for eMMC, USB, UART, I2C, SPI and Keys (except keyboard)
- Full support for vendor specific ATAGs
- usbserial barebox console access by pressing Select button at startup,
alternatively full console support on connector J14.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The first is important for imx systems with NAND. The second is a useful
debug aid that doesn't change behaviour without being explicitly enabled
at runtime. So both should be safe.
The other changes result from MFD_MC13XXX and SPI_IMX being selected by
MACH_PCM038 since 4bd07a1039 ("arm: imx: select MFD_MC13XXX for all
boards that need it") and a move of a few Kconfig definitions in
7839011f61 ("bootm: Move bootm options to common/Kconfig").
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The bits VGEN10-11 and VGEN20-22 is positioned in the Regulator Setting 0
register. This patch fixes these definitions and board (Efika MX), which
uses this voltages.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit adds basic mmu support, ie:
- DMA cache handling is not supported
- Remapping memory region also
The current mmu setting is:
- 4KB granularity
- 3 level lookup (skipping L0)
- 33 bits per VA
This is based on coreboot and u-boot mmu configuration.
Signed-off-by: Raphael Poggi <poggi.raph@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enclosed by #if directive OMAP specific code
and mmu_disable (ARMv8 code will implemented it somewhere else).
Signed-off-by: Raphael Poggi <poggi.raph@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds arm64 specific codes, which are:
- exception support
- cache support
- rework Makefile to support arm64
Signed-off-by: Raphael Poggi <poggi.raph@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit create a common directory, lib/,
for arm and arm64 common code.
It also create lib32/ and lib64/ for 32bit
and 64bit code respectively.
Signed-off-by: Raphael Poggi <poggi.raph@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Three iomux were accessinble with two distinct names, typo?
Remove the unused duplicates.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
No need to define some of the iomux twice, remove the duplicates.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add some missing Clock Gate Register element shifters which were implemented
as magic numbers in the arm/boards directory. Use the new shifters for
inproved code readability.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
According to the kernel documentation it is recommended to place the
compressed image between 32 MiB and 128 MiB. The DTB and initrd should
be placed above 128 MiB. We will follow the recommendation as long as we
have enough RAM. If this is not the case, we fall back to the scheme.
This change is required because of the ARM default kernel config changes
regarding RODATA layout, which lead to an increased compression factor
of the kernel image.
This should be regarded as an intermediate solution until there is a
mechanism for the kernel image to report the decompressed layout
requirements to the bootloader.
Signed-off-by: Stefan Müller-Klieser <s.mueller-klieser@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With commit 962d8b89d2 ("imx35-regs: add defines for USB and SD") the
shifter argument for the iMX35 ESDHC1 CGR instance has been erroneously
assigned to CGR1 instead of CGR0. Fix this for the eukrea-cpuimx35 board.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Macros for three PLL setups got cloned in different board specific subdirs.
Re-unify those macros into a common place and avoid checkpatch 80-char
warnings when creating a new board subdir.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move the definition of iMX CPU types to an individual file to allow
on-purpose inclusion. Eliminate magic number CPU type encoding in the
scripts/imx subdir using the new include file.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add a redundant barebox partition to improve nand safety at
least a little bit.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Make it possible to write barebox image to multiple partitions
like xload partitions.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add a support for a redundant barebox backup partition if loading
barebox image from first barebox partitions fails.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Board specific ATAGs might be passed to vendor provided kernels via the
ARM_BOARD_APPEND_ATAG option. In this case, the board specific ATAGs will
be appended to the end of the ATAG list.
Anyway, some vendor provided kernels might crop the ATAG list at ATAG_MEM,
also chopping off the board specific ATAGs, see linux squash_mem_tags() as
reference. The Kindle-3 kernel is one example.
This conflict might be solved by a) making ATAG_MEM optional which might break
the existing behavour around squash_mem_tags() or b) by allowing the insertion
of board specific ATAGs in front of ATAG_MEM which violates the requirement
from Documentation/arm/Booting to order ATAGs by increasing address.
Add option to insert board specific ATAGs in front of ATAG_MEM.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The imx53 SOC features 128kB of internal SRAM which is commonly used in
early stages of barebox to store the stack. Avoid magic numbers while
addressing this RAM.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
GPIO leds are widely used in imx_v7 related dts files. Enable support
to parse this data and enable blinking LED by defconfig on e.g. iMX53qsb.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
No need anymore to store arm_head_bottom globally as it's only used
in barebox_non_pbl_start(). Also rename the variable to malloc_end
which is more meaningful.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We already have a pointer for barebox_boarddata, so use it to
request the corresponding SDRAM region instead of calculating
it again.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
barebox_boarddata should stay the original boarddata and not
be modified. Keep a local pointer in barebox_arm_boot_dtb()
instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fixes: 65071bd arm: Clarify memory layout calculation
arm_mem_barebox_image() shall return the beginning of the barebox
image (and thus the end of the malloc region). For relocatable
images we can return a suitable location, but for non relocatable
images we do not have a choice: We must return TEXT_BASE. If TEXT_BASE
happens to be outside the memory region between membase and endmem
we can return the base of the ramoops area.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Markus Pargmann <mpa@pengutronix.de>
The barebox specific properties have not been applied as
the TQMa53 overlay DT has not been included. Fix this.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The HABv3 images for engineering mode do not work on a production device
and the images for production mode do not work on an engineering device.
When in engineering mode the ROM checks the images, but does not stop
booting when the signatures are wrong. This means a production image
can still be booted on an engineering device. This device can be
temporarily put into production mode by writing to the HAB_TYPE shadow
fuse register. After a reset the device will come up in production mode
and the image can be tested for validity. This means that if we have to
decide between production mode images and engineering images, the
production images are a better decision. Change this accordingly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a function to enable/disable permanent write for the IIM
module so that C users no longer have to fiddle with device parameters.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Accessing the IIM registers is cumbersome. The fuses are documented with
different register strides and there is no header file available, so the
different fields have to be read in the datasheets and translated into
the barebox format over and over again. This patch adds a header file
which has defines for the various fuses (for i.MX25 only so far, but
others can be added later) along with C functions to read/write the
fields.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
bootm has a C API, so the bootm options have to depend on the
option providing the bootm code (CONFIG_BOOTM), not on the
option providing the command (CONFIG_CMD_BOOTM). Fixing the
dependencies makes it possible to fully use bootm from C without
enabling the bootm command support.
This also removes the CMD_ prefix from the options which means
we have to update the defconfigs aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Rename the already global array of default memory settings to make the
intended usage more obvious.
Also make generous use of the const keyword.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For the phyCORE-i.MX6 add an automount command for the first partition
on the eMMC device.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enable NOR for phyCORE-i.MX6 DualLite and Quad eMMC variants.
Furthermore add an extra 'status = "disabled"' in the flash node. It
has no functional effect, because the SPI bus node 'ecspi1' is disabled,
too.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some phyCORE-i.MX6 variants have eMMC instead of a NAND chip. Provide an
update_handler for them.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The extra environment folder for the phyCORE-i.MX6 had the suffix
'-mira'. That's the name of a baseboard. Since the bootloader is generic
for all baseboards, use a generic suffix for the environment folder.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Update RAM calibration values in the flashheader file for phyCORE-i.MX6
DualLite/Solo. These are verified and tested in the climatic chamber for
commercial, extended commercial, industrial and automotive i.MX6
variants.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The phyCORE-i.MX6 has either a NAND or EMMC storage device and an
external SD-Card interface. The automatic bootsource detection in the
barebox environment should reflect that.
- If the board was booted from the external SD-Card interface, it should
continue loading the kernel and device tree from it.
- If the board was booted from EMMC, it should load kernel and device
tree from the boot partition on the EMMC.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add missing MMC barebox environment partitions for the phyCORE-i.MX6
with EMMC. Otherwise the barebox cannot find the environment, when the
board is boot from sd-card.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use a longer reset time for ethernet phy Micrel KSZ9031RNX. Otherwise a
small percentage of modules have 'transmission timeouts' errors like
barebox@Phytec phyFLEX-i.MX6 Quad Carrier-Board:/ ifup eth0
warning: No MAC address set. Using random address 7e:94:4d:02:f8:f3
eth0: 1000Mbps full duplex link detected
eth0: transmission timeout
T eth0: transmission timeout
T eth0: transmission timeout
T eth0: transmission timeout
T eth0: transmission timeout
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Due to hardware issues the usdhc3 interface on phyBOARD-ALCOR i.MX6 and
phyBOARD-SUBRA i.MX6 doesn't work reliable at 50Mhz. You get
communication errors like
barebox@Phytec phyBOARD SUBRA:/ ls /mnt/mmc/
mmc2: detected SD card version 2.0
mmc2: registered mmc2
imx-esdhc 2198000.usdhc: timeout 2
mmc2: Cannot read MBR/partition table
Therefore reduce the maximum clock speed to avoid these problems.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for phyBOARD-SUBRA-i.MX6 with phyFLEX-i.MX6 Quad 1GiB on one
bank. This patch factors out the common device tree nodes for the Quad
and Solo variant into 'imx6qdl-phytec-phyboard-subra.dtsi'.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enable the mmc_extcsd command to read and write MMC/eMMC registers.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Alexander Kurz
Steffen Trumtrar
Lucas Stach
Teresa Remmet
Yegor Yefremov
Lucas Stach
Uwe Kleine-König
Andrey Smirnov
Jan Luebbe
Wadim Egorov
Ulrich Ölmann
Vicente Bergas
Alexander Shiyan
Raphael Poggi
Stefan Müller-Klieser
Stefan Christ
Christian Hemp
Jan Remmet