Add a basic low-level pad configuration function that can be used to
implement early boot pin configuration code as well as shared with
various iomuxv3 and vf610 drivers.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Mask ROM leaves the CPU running at 264Mhz, so configure the clock tree
such that CPU runs at maximum supported frequency. Maximum supported
frequncy is determined from speed grading burned into OCOTP fusebox by
the vendor.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add fusemap header for VF610 and move out fuse definitions that are
shared with i.MX6 familiy into a sperate file (ocotp-fusemap.h).
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
According to the datasheet SJC_RESP_LOCK is one bit wide, adjust the
definition correspondingly.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add imx_ocotp_sense_enable() function to allow changing that aspect of
OCOTP driver behaviour before calling imx_ocotp_read_field()
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On Vybrid SoC OCOTP module contains speed grading information that is
needed to correctly adjust CPU clock to its maxumum rate, so we need to
have this information handy as early as possible.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i.MX SoC variants like Vybrid have more than one built-in Ethernet
interface and as a consequence support storing more than one MAC address
in OCOTP module. Add code to create multiple 'mac_addr<n>' parameters as
well as 'mac_addr' as an "alias" to 'mac_addr0' for backwards
compatibility.
Acked-by: Stefan Lengfeld <s.lengfeld@phytec.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move memory reversing, found in imx_ocotp_get_mac and
imx_ocotp_set_mac, into a subroutine to avoid code duplication.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Shadow memory does not have a true 1:1 mapping to fuse address
space. All i.MX6 devices, with exception of i.MX6SL have a 0x100 byte
gap between banks 5 and 6 (or addresses 0x2f and 0x30), so we need to
account for that when reading data from shadow memory.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enable OCOTP driver on Vybrid as well as i.MX6
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Give enet_osc explicit "enet_ext" name, since without it, Barebox
version of clk_set_parent fails when trying to re-parent "enet_sel".
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move clk code from 'mach-imx' to 'drivers' to keep the code tree
structure closer to that of analogous one from Linux kernel and,
arguably although subjective, to keep 'mach-imx' less cluttered.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enabling the MMU (and so the caches) gives a nice performance boost, so
opt in for mvebu_defconfig.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Prolong global reset to the max. value of 0xff. Such a long reset
is required for some peripherals found on Baltos devices.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
PRM_RSTTIME register provides settings for global and power domain
reset durations.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The compatible vendor prefix for dialog pmic is dlg. We fix it in
the devicetrees using the wrong one.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The fpgamgr and sysmgr bindings are now in the upstream dtsi.
Remove them.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There is no fpga.c file.
Remove the entry.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It's no longer possible to assign a string to menu->display, instead
menu_add_title() must be called. Fix this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The file 'imx6qdl.dtsi' is already included by DualLite/Solo and
Dual/Quad specific files 'imx6dl.dtsi' and 'imx6q.dtsi'. So the include
is not needed here.
Signed-off-by: Stefan Lengfeld <s.lengfeld@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add the missing txc-skew-ps and rxc-skew-ps settings for the Micrel PHY.
I have seen problems with 1GBit ethernet on a phyCORE-i.MX6 Solo. Oddly
enough the missing skew values are no problems for all our other
modules.
Signed-off-by: Stefan Lengfeld <s.lengfeld@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Refactor the common settings for device tree node 'fec' into the generic
phycore i.MX6 device tree file. This avoid redundant settings and makes
common fixes easier. Our kernel device tree files have the same layout.
Signed-off-by: Stefan Lengfeld <s.lengfeld@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Chose name according to kernel. This is needed for bootstate.
Signed-off-by: Jan Remmet <j.remmet@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some boards or SoCs need the SRC_SCR[WARM_RESET_ENABLE] bit cleared,
otherwise they won't come up after a watchdog reset. This was observed
on one i.MX6ul based custom board. The Linux Kernel does the same since
2012: 0575fb7 ARM: 7198/1: arm/imx6: add restart support for imx6q.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
tested with Micron MT42L128M64D2LL-25WT and MT42L128M64D2LL-25WT
Signed-off-by: Maik Otto <m.otto@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Code-paths responsible for initializing CPU's stack pointer and variable
used in stack memory resource reservation got out of sync which resulted
in actual stack being 64K off from what "stack" struct resource
registered by arm_request_stack() thought it was.
At least one issue resulting from that can be easily triggered by
running:
memtest -t
This commit unifies the aforementioned code to a certain degree which
solves the problem and hopefuly makes it less likely to become an issue
again.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This has been missed in commit 5e61dd3fb5
(Add comp_copy function for use with CONFIG_IMAGE_COMPRESSION_NONE).
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
PBL is another feature, which needs some love to work on ARM64.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This fixes commit 0b47f95340 for i.MX25/35.
Otherwise the bootsource was just "unknown".
Signed-off-by: Daniel Krueger <daniel.krueger@systec-electronic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add functions to access the OCOTP fuses field wise, similar to what has
been done for the IIM. Also add a i.MX6 fusemap header file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When CONFIG_OFTREE is enabled the appended device tree is unflattened
and put into data->of_root_node, but there it is never used again.
To actually use the appended device tree put it into data->oftree
instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Make access to the mc13892 charger parameter voltage, current and max power
dissipation readable in terms of millivolts, milliamps and milliwatts.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This was missed when updating all the partition sizes. The
environment partition has been moved to the correct location,
but the barebox partition size remained unchanged.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We need to add the spi aliases to set the bus number correct in
the driver.
Delete the spi1 alias again in the am33xx-strip.dtsi for MLO as
the node is deleted there also.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
EEPROM information is needed in barebox.bin in order to setup MACs and
select appropriate DTB from kernel-fit.itb, so disable this initcall
in MLO.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When a initrd is given we calculate the next free memory position
as:
free_mem = PAGE_ALIGN(initrd_end);
This is wrong when initrd_end exactly falls on a page boundary.
In this case PAGE_ALIGN() does nothing and free_mem becomes
initrd_end and the following bootm_load_devicetree() and thus
booting fails with -ENOMEM.
Fix this by correctly advancing to the next free memory position.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The defconfig files are long untouched and a
make xy_defconfig; make savedefconfig usually generates quite
a different looking file. Refresh them to make it easier to generate
patches against the configs using
make xy_defconfig; make menuconfig; make savedefconfig
This has been done with the following script.
for a in arch/*; do
arch=$(basename $a)
for c in $a/configs/*; do
config=$(basename $c)
export ARCH=$arch
make $config && make savedefconfig && mv defconfig $c
done
done
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Auvidea H100 is a baseboard for the SolidRun MicroSOM, which
provides HDMI IN/OUT capabilities.
Currently supported is only a combination of the H100 baseboard
with a i2eX MicroSOM.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of hardcoding the different RAM sizes.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
So far it was hardcoded for each board if defenv-1 or defenv-2 is used.
Make this a user choice so that a particular board no longer enforces
a defenv type.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently it's hardcoded for each board which defaultenv version is
used. This is unfortunate since some people like the other defaultenv
version better and may want to select it.
This patch removes the board specific environment path
CONFIG_DEFAULT_ENVIRONMENT_PATH and instead adds it via:
if (IS_ENABLED(CONFIG_DEFAULT_ENVIRONMENT_GENERIC))
defaultenv_append_directory(defaultenv_<board>);
This way we can make sure that the defaultenv-1 board specific bits are
only compiled in when defaultenv-1 is actually in use.
The next step is to make the defaultenv version selection a user visible
choice.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
OnRISC Baltos devices are based on a am335x SoC and can be booted
either from MMC or NAND.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM64 has native instructions for division and thus doesn't need the
helper functions implemented in those files.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Don't allow it to be selected in a ARM64 build.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The unwind code to support this feature is not there yet.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We don't yet have an implementation for those two features on ARM64, so move
them to a place where they are only selected for a 32bit barebox.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current ARM64 lowlevel code needs the exception vector to set
up all the ELs. Select ARM_EXCEPTIONS to make sure this is always
present.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Register imx6_fixup_cpus() for MX6Q+ as well as for MX6Q and MX6DL.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Factor out CPU revision identification code from imx6_init() into a
standalone inline function (similar to imx6_cpu_type()), so that it
would be possible to use that functionality in PBL code.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The 'nv' command can add/remove multiple variables. Implement that
for the 'global' command aswell. Also with the 'nv' command the -r
option is for removal of variables, not for "set match". Looking at
the users of "global -r" the only user uses the command for removal
of variables and not for "Setting multiple variables to the same value"
as stated in the command help text. Let "global -r" remove variables
aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since ce6755ca1c, both IPU and OpenVG are
enabled if CONFIG_DRIVER_VIDEO_IMX_IPUV3 is true, but in the other case,
only OpenVG was disabled.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These registers are already set by imx6_ccm_probe (in clk-imx6.c) during
core_initcall, while imx6_init_lowlevel is only called during
postcore_initcall via imx_init in imx.c.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The NoC regulator only passes the QoS signals through if it is
in bypass mode. This is a safe setting to give the IPU priority
over other requests. The kernel may change it to some other setting
once it knows the bandwidth requirements of the use-case.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
SX and SL variants only include the PXP and have no IPU, so
skip any IPU related QoS setup.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Split into separate function and only call it after the chip type
and revision is known.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The image built with vincell_defconfig has become too big to fit
into the SoC internal SRAM. Make it smaller by disabling UBIFS
support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that we can start images bigger than internal SRAM size we can
enable the Vincell support in the imx_v7_defconfig.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Vincell boards do the SDRAM setup from board init code, so the
image size is limited to the internal SRAM size. To overcome this
limitation use the NAND xload support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some i.MX53 want to setup the SDRAM from C code rather than
from DCD tables. The image size for these boards is limited
to the internal SRAM size. To overcome this limitation for
i.MX53 boards booting from NAND implement an xload mechanism
to load only the PBL to SRAM and let barebox load the rest
of the image itself after SDRAM has been initialized.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move v3 register definitions to include file so that they can
be reused for the early nand boot code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The regular bootsource functions only work in a running barebox,
provide functions for early code. This has already been done for
i.MX6, this patch adds the same functions for the other SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The functions can determine the necessary base addresses
themselves since they are SoC specific anyway.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The bootloader partition size was increased to 0xe0000, so adjust
the barebox update handler partition size accordingly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The phy reset for the Vincell board is done from device tree whereas
the Vincell-LT resets the phy from board init code. Since both boards
share the same code base the regular Vincell board ends up with a
duplicated phy reset, with the second reset being done after the
FEC has been initialized.
Fix this by removing the phy reset from the board code and adding the
phy reset to the Vincell-LT dts file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
None of the available boards for mvebu has any environment additions, so
this is safe.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is the result of
make mvebu_defconfig
make savedefconfig
mv defconfig arch/arm/configs/mvebu_defconfig
.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The check for is_imx6q was introduced initially in
f1f6d76370 ("ARM: i.MX6: correct work flow of PFDs from uboot-sources")
to differentiate between i.MX6DL+i.MX6SL and i.MX6Q. The i.MX6D must be
handled like the latter, so drop the check. i.MX6DL+i.MX6SL can be
ignored here since since
a665962824 ("imx6: lowlevel_init: Fix workaround for new i.MX6s chips")
the PFD handling is only done for i.MX6DQ.
Update the comment to be not only logically correct but also helpful.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arm_mem_barebox_image() is used to pick a suitable place where to
put the final image to. This is called from both the PBL uncompression
code and also from the final image. To make it work properly it is
crucial that it's called with the same arguments both times. Currently
it is called with the wrong image size from the PBL uncompression code.
The size passed to arm_mem_barebox_image() has to be the size of the
whole uncompressed image including the BSS segment size. The PBL code
calls it with the compressed image size instead and without the BSS
segment. This patch fixes this by reading the uncompressed image size
from the compressed binary (the uncompressed size is appended to the
end of the compressed binary by our compression wrappers). The size
of the BSS segment is unknown though by the PBL uncompression code,
so we introduce a maximum BSS size which is used instead.
The code before this patch worked by accident because the base address
of the final image was aligned down to a 1MiB boundary. The alignment
was sufficient already to make enough space. This breaks though when
the uncompressed image including BSS becomes bigger than 1MiB while
the compressed image is smaller.
Fixes: 65071bd0: arm: Clarify memory layout calculation
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Makefile compression commands all append the size of the
uncompressed image. With CONFIG_IMAGE_COMPRESSION_NONE simply
'shipped' is used which does not append the size. Add and use
a special comp_copy function which adds the size. This helps
us to get the uncompressed image size in the startup code later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enable parent rate propagation for clk_gate2 to allow the
clock consumers to adjust their rates.
One effect of this is that the i.MX6 NAND controller now can adjust
its rate. It already called a clk_set_rate(rate, 96000000), but this
had no effect, so the clock stayed at reset default 24MHz resulting
in a rather slow timing. This became a problem when commit
"1daa3bc mtd: nand_mxs: Setup timing" introduced EDO timing mode for
faster NAND chips. EDO mode can only work properly for cycle times
< 30ns (at least that's specified in the ONFI spec). 1daa3bc resulted
in sporadic NAND read errors on some boards.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sam Ravnborg <sam@ravnborg.org>
As a i.MX6dl board dts imx6dl-tx6u.dts should include imx6dl.dtsi, not
the i.MX6q variant. This fixes various pinctrl problems.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move all MX5 clock functionality which does not apply to i.MX50 to
a new mx51_mx53 related function.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Of_unflatten_dtb returns a ERR_PTR value so checking it against NULL is
incorrect. Fix it in all of the places where this was happening.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The phyCORE-RK3288 aka PCM-059 is a SoM (System on Module)
containing a RK3288 SoC. The module can be connected to different
carrier boards.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To be able to use PBL console do the usual
relocate_to_current_adr()/setup_c() dance and call pbl_set_putc() to
tell the PBL console where the UART is.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The second level page tables can only start at a 1MiB section boundary,
so instead of calling arm_create_pte() with the high vector address
(which is 0xffff0000, not 1MiB aligned) we have to call it with
0xfff00000 to correctly create a second level page table.
The old values broke SoCs which have peripherals in the upper 1MiB
area, like for example the Atmel AT91RM9200. On these Socs we correctly
created the vector page, but the pages around it did not have a 1:1
mapping anymore which led to unreachable peripherals.
Fixes: f6b77fe9: ARM: Rework vector table setup
Reported-by: Peter Kardos <kardos.peter.sk@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Peter Kardos <kardos.peter.sk@gmail.com>
The *-menu-add-entry functions no longer exist in defaultenv-2, so
remove the calls to these functions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some boards duplicate the PS1 initialization to add a '#' at the end
of the prompt. It's not worth duplicating this for this purpose. Remove
them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The RK3288 SoC is a low power, high performance processor for mobile phones,
personal mobile internet devices and other digital multimedia applications.
It has an integrated quad-core cortex-A17 with separate NEON coprocessor.
Prepare mach-rockchip infrastructure for Rockchip RK3288 support.
Let's seperate the RK3188 and RK3288 SoCs. Later we will have two different
configs.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
'clean' target is listed on 'no-dot-config-targets' list in main
Makefile so that conditional statement would yeild the same result
every time. Given how CLEAN_FILES are rm'ed with -f there should be no
harm in specifying them both unconditionally.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
CONFIG_CPU_V8 is checked against 'y' and 'n', but the case when the
variable is unset is not considered.
This patch only checks the variable against a single value 'y' so the
logic is always coherent even when the variable is unset.
Signed-off-by: Vicente Bergas <vicencb@gmail.com>
Tested-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This creates an image that can be booted via USB.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX31 SPI interface was refered by freescale as spi_ver_0_4 in one
of their older vendor extended linux releases. spi_ver_0_4 differs only
in minor aspects to spi_ver_0_7 (i.MX35) which is already supported by
barebox.
Regarding barebox, the differences boil down to the location and length
of the CHIP SELECT and BIT COUNT/BURST LENGTH elements of CONREG. The
spi_ver_0_4 variant is limited to single word bursts with a maximum of
32 bits_per_word.
Add support for the i.MX31 SPI interface to the barebox spi_ver_0_7
implementation.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Andrey Smirnov
Sascha Hauer
Uwe Kleine-König
Yegor Yefremov
Michael Grzeschik
Steffen Trumtrar
Christian Hemp
Stefan Lengfeld
Jan Remmet
Maik Otto
Lucas Stach
Daniel Krüger
Alexander Kurz
Lucas Stach
Teresa Remmet
Jan Luebbe
Wadim Egorov
Ulrich Ölmann
Vicente Bergas