During card probe the mci core may send commands to the card
which the card doesn't understand. This is intended, so do not
print an error message here.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds the STUFF_BITS macro from the kernel to extract numbers
from the csd. This also fixes several places where the csd fields
in SD cards differ from MMC cards.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we print the correct size
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as in linux
SD/MMC support only mode 0 or 3 (if 0 not supported by the spi master)
so if the mode is not 3 force 0
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we can detect sd card version 2.0 on spi
as we need to the OCR_HCS on version 2.0 regardless if it's a SPI or not
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The spec says: "the CMD8 CRC verification is always enabled.
The Host shall set correct CRC in the argument ofCMD8. If
CRC error is detected, card returns CRC error in R1 response
regardless of command index."
Make it simple, and compute crc on every commands.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The old clock support is now unused. Remove it. The former i.MX clko
command is superseeded by generic clock manipulation commands.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The timeout for wating for the bus to be idle is too short when the
card does internal garbage collection. This was triggered with filling
an SD card under Linux with /dev/urandom, then doing a saveenv under
barebox afterwards.
Linux has timeouts here up to 300ms. Use a second to be safe.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a SPI bus on which the SPI devices and drivers register.
This makes it cleaner as SPI devices won't accidently end up probed by
a platform_device driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Use be(xx)_to_cpu function to switch endianness intelligently.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As per MMC spec, once power has been applied to an SD card, the card
can take as much as 250ms to complete its power-up cycle, and become
responsive to CMD0.
When this delay was not in place, activating the SD card in the env
init failed sometimes. With it, no more failure are observed.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pxamci driver was not waiting for the BUSY line to be
deasserted. This was specifically breaking the CMD12 at
the end of block multiple writes, when the SD card had not
time enough to commit the last write.
Fix it by waiting for PRG_DONE bit (which is actually the
busy signal end condition).
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pxamci requires a bit to be set in the command control
register when a CMD12 is sent. Set it, as required in the
PXA Developer Manuel, chapter "Stop Data Transmission
Command (CMD12 or IO/Abort with CMD52)".
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When preparing a command, apply a mask so that only the command part
will be used for the switch case. This will be more robust
for future command response types.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix clock handling accordingly to PXA manual :
- enable the MMC controller clock once and for all
- only disable the MMC bus clock when changing the MMCLK by
adjusting the clock ratio, else let the controller and SD
card shut down the clock as the see fit.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of using hard encoded values in the code, use defines to setup
the timeouts of reads/writes/commands.
Fix the read timeout as defined in the PXA Developer Manual.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We are already setup voltages from capabilities register.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If a read or write operation encounters an error, the card
might stay in "recv" or "data" state, and never get back to
"tran" state.
In these cases, the host is required to send a CMD12 (end
transmission) to switch the FSM of the card back to "tran"
state, as described in MMC Specification, chapter "Data
Transfer Mode".
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Whether the controller works in 8bit mode is not only dependent
on the controller but also on the board having wired up 8 data
lines, so put a capabilities field in platform data.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently we test the cards capabilities for being 8bit capable.
This does not work since noone ever sets this bit. Unfortunately
there is no bit to test 8bit capability, so we introduce a patch
from the kernel which puts the mmc card into 8bit mode and tests
whether it can succesfully read the ext_csd in this mode.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Too often I have waited to get a reaction from this driver
when something goes wrong. Use timeout loops instead of
inifinite polling loops.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is quite useful when multiple SD cards are present so spare
some bytes to print this information.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There will always be the next integer number unless we register
INT_MAX disk devices which is rarely the case.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The mci layer uses pr_debug throughout. Use dev_dbg instead
which is very useful when multiple cards are involved.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The mci layer currently passes around a struct device_d for
its internal use. Apart from being confusing this drops
typesafety for no good reason. Instead, pass around a struct
mci.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The s3c driver passes around a struct device_d * internally in which
it is never interested in. Instead pass around a struct s3c_mci_host
and get rid of all this ugly void * derefs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Yes, it does make sense. First there will always be the next
hardware which has multiple controllers. Also, we shouldn't
give bad examples to others.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As we'll need more arguments to set_ios over time put them
in a struct mci_ios like the kernel does.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Whether a card is high capacity is checked in
sd_send_op_cond/mmc_send_op_cond. Remove the wrong check in
mmc_change_freq which wrongly recognizes some eMMC flash
as high capacity.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
in commit commit f60f6c58e
atmel_mci: check for device id we use to address the right slot
the driver use the dev_id to detect the slot which is wrong on 9263 as we have
2 devices with 2 slots
use slot_b paramter to specify the slot as done in linux
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There are major differences in the clock tree of the S3C24xx family and the
more recent CPUs of the S3C family. Keep the S3C24XX clock routines separate to
avoid an ifdef hell. But also use generic function names to be able to
share drivers among the S3C family.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Start with renaming files to share them in the S3C CPU family,
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The clock rate was incorrectly calculated, leading to a
frequency of 19.5MHz / 64 instead of 19.5Mz for the host
controller.
with the fix applied, a copy of a file of 230 kB shrinks
from 6000ms to 123ms.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Support the setup of the mmc voltage, when booting OMAP4 with twl6030
from nand.
Signed-off-by: Alexander Aring <a.aring@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Increase pxa reading performance by reading 4 bytes at a
time instead of 4 reads of 1 byte.
As the mci controller FIFO accepts reads on bytes, halfwords
or words, use words whenether possible.
The boost is for a 250KBytes file read and display (bmp):
- before: 6900ms
- after: 6000ms
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The write data timeout is too small for old cards,
especially the Transcend 256MBytes SD card. Increase it from
10ms to 100ms.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add a simple PIO based host controller for MMC and SD cards
on PXA SoCs. Reads and writes are available, and no usage is
made of DMA or IRQs.
SPI mode is not supported yet.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We have to check which sd card slot we use. The registered mmc_id is the
the correct parameter for this.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as example today if the timeout happened we can not probe the SD card again
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without CRC support the mmc spi driver fails to compile with
the following:
drivers/mci/mci_spi.c:74:18: error: static declaration of 'crc7' follows non-static declaration
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
'ATA' means more an interface than a disk drive. Change the names to reflect
their real meaning.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds MMC over SPI support to mci-core.c and
mci_spi.c driver.
This driver is useful when SOC doesn't have built-in MCI
component. Tested with nios, 2Go SD-CARD and FAT file system.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We used to loop around the sectors in mci_sd_write/mci_sd_read.
Now that we have multi block read and write this is not necessary
anymore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To allow for some generic io accessors introduce io.h and use
this instead of asm/io.h throughout the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit 4c542622 used the wrong variable name and caused a build failure.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add platform data to specify maximum frequency of hsmmc interface
which can be restricted due to external level shifters.
Signed-off-by: Juergen Kilb <J.Kilb@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In the Kernel this bug is described like this:
> The CMDTYPE of the CMD register (offset 0xE) should be set to
> "11" when the STOP CMD12 is issued on imx53 to abort one
> open ended multi-blk IO. Otherwise the TC INT wouldn't
> be generated.
> In exact block transfer, the controller doesn't complete the
> operations automatically as required at the end of the
> transfer and remains on hold if the abort command is not sent.
> As a result, the TC flag is not asserted and SW received timeout
> exeception. Bit1 of Vendor Spec registor is used to fix it.
We do not use exact block transfers in barebox, so we only need
the first part of this fix.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When the bus_width was set to 8, then only one data-line has been initialized.
Signed-off-by: Hubert Feurstein <h.feurstein@gmail.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Most cards do not answer if some reserved bits
in the ocr are set. However, some controllers
can set bit 7 (reserved for low voltages), but
how to manage low voltages SD card is not yet
specified.
based on the original U-Boot patch from
Stefano Babic <sbabic@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It will be called by set_ios anyway later. Also, do not
alter host->clock field, this is none of our business.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows for more type safety. passing a struct device_d
internally in the driver is not a good idea. Also, this
patch adds a void __iomem *regs to mxs_mci_host. dev->map_base
should not be used for register accesses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There is no need to fill the FIFOs before starting a transfer, so
remove corresponding code which is commented out anyway. Additionally
this fixes a compiler warning with gcc4.5
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Jürgen Beisert <jbe@pengutronix.de>
We never supported the sigmatel stm chips and probably
never will. So do the first step and rename the architecture
to mxs just like in the kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The idea is to panic() when there is no memory available for normal
operation. Exception: code which can consume arbitrary amount of RAM
(example: files allocated in ramfs) must report error instead of panic().
This patch also fixes code which didn't check for NULL from malloc() etc.
Usage: malloc(), memalign() return NULL when out of RAM.
xmalloc(), xmemalign() always return non-NULL or panic().
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i.MX23 currently uses kHz as the unit for its clock handling and calculation
to avoid overflows when calculation with the internal 480 MHz PLL and its
fractional divider. This patch changes all routines to accept Hz and deliver
Hz as the clock unit.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Silence this warning:
drivers/mci/mci-core.c:1324: Warning: argument `pdata' of command @param is not found in the argument list of mci_register(struct mci_host *host)
drivers/mci/mci-core.c:1324: Warning: The following parameters of mci_register(struct mci_host *host) are not documented:
parameter host
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some mci controllers cannot transfer data with their DMA engines
if the data is not sufficiently aligned. Normally this is a driver
problem, but hey, we have no problem aligning the data and keep
the burden from the drivers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Juergen Beisert <jbe@pengutronix.de>
Acked-by: Juergen Beisert <jbe@pengurtronix.de>
So far only for reading blocks. This is based on the corresponding
U-Boot code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Juergen Beisert <jbe@pengutronix.de>
Acked-by: Juergen Beisert <jbe@pengurtronix.de>
The i.MX23 v2 architecture patch series was sligthly modified to easify
the i.MX28 architecture addition later on. So, we need now an index to
query the SSP clock frequency.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Due to a wrong rounding while calculating the clock divider the requested clock
of 25 MHz resulted into a 48 MHz clock. With this patch a clock frequency
below or equal the requested one will be set.
By using 'div' and 'rate' as vars, its also easier to check against the data
sheet.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This card is working since 'mci: handle SD cards < 2.0 correctly'
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Jürgen Beisert <jbe@pengutronix.de>
Most SD controllers need some kind of alignment for writing
blocks. Instead of coding this in every driver, align write
blocks to a 4 byte alignment in the mci layer. For DMA
accesses we may need bigger alignment, but let's solve this
problem when we have it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With SD cards older than 2.0 the sd_send_if_cond() fails. Do
not assume it's an MMC card in this case. Instead, assume
it's a MMC card if sd_send_op_cond() fails.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a driver for the esdhc controller found on Freescale
i.MX25/35/51 SoCs.
This code is based on the U-Boot driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adding MCI card support for S3C2440 CPUs. This is for reference only, as there
is currently no user in the barebox tree. Maybe one with access to the A9M2440
development kit can check it on his/her system.
Checked here with my own S3C2440 based system which is not in the barebox tree.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adding MCI card support for STM378x/i.MX23 CPUs. This is for reference only,
as this architecture is currently not part of barebox (but will coming soon).
Its tested on the i.MX23 based ChumbyOne.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds the basic framework to handle MCI cards in barebox.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
