For making the same binary executable on different SoCs which have
different DRAM addresses we have to be independent of the compile
time link address.
This patch adds relocatable binary support for the ARM architecture.
With this two new functions are available. relocate_to_current_adr
will fixup the binary to continue executing from the current position.
relocate_to_adr will copy the binary to a given address, fixup the
binary and continue executing from there.
For the PBL and the real image relocatable support can be enabled
independently. This is done to (hopefully) better cope with setups
where the PBL runs from SRAM or ROM and the real binary does not.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With relocatable binaries the vector addresses cannot be supplied by
the linker. This adds support for fixing them up during runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With relocatable binaries the linker is not able to supply absolute
addresses. These only get available when the relocation function is
being run. Since for early initialization we need some variables
before relocation, we supply them relatively to some known address
in the binary. This means that the variables have to be converted
to absolute addresses during runtime.
This patch adds a C macro and an assembly macro to calculate the
variables during runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This makes it possible to modify the tree in the handlers.
This is necessary because the initrd addresses are only
known inside the handlers, but not to the generic bootm
code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without compiled in devicetree support we used to copy the
concatenated devicetree directly behind the zImage. This is
unnecessary, even if we do not have devicetree support we can
copy the devicetree whereever we like and pass the kernel a
pointer to it. This makes the code a bit easier.
While at it, add the missing free calls in the error case.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With this every devicetree is first converted to the barebox internal
format before it's converted back to dtb again.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In order to be able to handle multiple devicetrees, do not assume
the tree to be unflattened is the barebox internal one. Instead,
just return a pointer to it and assign the barebox internal root_node
external to the unflatten function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When the board is booted from NAND we have to setup the iomux to
make the SD card work. Unfortunately this still is not enough :(
The SD card still will only work when booting from it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since recently with MMU_EARLY support it may happen that setup_c
runs with data caches enabled, so we have to make sure the caches
are flushed before we jump to the new binary.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When we have multi cpu support compiled in we need the cpu architecture
early so that we can pick the correct cacheflush function. Make it available
as static inline function and add a comment above it that this function
normally should not be used.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Support for ext filesystems has been introduced recently. We can now
boot directly from our rootfs, loading the kernel and device tree
images from /boot.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
depending on the power domain register we need to disable sata or mmc
and update the cpu informations
take from Calxeda U-Boot git
Register the original dtb to /dev/firmware-dtb and the fixed dtb to /dev/dtb
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so the board can use it
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since we added a new partition in the board, the partitions number of
the boot and rootfs partition have changed as well.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since the only storage medium on the cfa-10036 is the MMC card, we need
to have a registered environment partition on it if we want to be able
to modify at runtime.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- switch to new environment
- make barebox partitions 512K big
- update defconfig for new env:
- enable menu support
- miitool support
- clk commands
- oftree support
- let/dirname/readlink commands
- enable external nand boot support
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is to complete the work of two recent commits:
- defenv2: move config-board out of /env/init
- defenv2: comment setting default values in /env/config
Signed-off-by: Fabio Porcedda <fabio.porcedda@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The reset value for the MAX clk gate is 0b10, that is it is turned
on in CPU run mode and off in stop mode. Configure it that way during
startup.
The 0b11 value previously in this field causes some nasty behaviour in
the Linux kernel:
- The i.MX35 has two bits per clock gate which are decoded as follows:
0b00 -> clock off
0b01 -> clock is on in run mode, off in wait/doze
0b10 -> clock is on in run/wait mode, off in doze
0b11 -> clock is always on
The MAX clock is needed by the SoC, yet unused in the Kernel, so the
common clock framework will disable it during late init time. It will
only disable clocks though which it detects as being on. This detection
is made depending on the lower bit of the gate. So with the value of
0b11 the clock framework will detect the clock as turned on, yet unused,
hence it will turn it off and the system locks up.
With the value of 0b10 instead, the clock framework will detect the
clock as being disabled and will not try to turn it off, so the
system works.
The real bug is in the Linux clock framework. However, the value 0f 0b10
seems to be a sane default value, so restore it. This lets Linux work
again and gives time to fix the bug in Linux.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We cannot jump to SDRAM unconditionally in imx*_barebox_boot_nand_external.
When we really boot from NOR flash the binary is not yet copied to SDRAM.
Instead, let the return value of imx_barebox_boot_nand_external() indicate
whether we really boot from NAND and only jump to SDRAM in this case.
Otherwise just continue to the normal SoC specific entry.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Only one of IIM, CCM or ESDCTL device is allowed, so use DEVICE_ID_SINGLE
for these devices.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
PCM038 uses IIM in board code, so select IMX_IIM symbol by default.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
needed by the real hardware
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Refactor to remove duplicated code without changing functionality.
Put "then" on the same line of "if", because:
- is the most used style in barebox
- is like c code style
- is more compact
Reduce the number of lines from 50 to 40.
Tested on at91sam9260ek.
Signed-off-by: Fabio Porcedda <fabio.porcedda@gmail.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides rename MFD-related symbols for using MFD-prefix.
Additionally, sorting mfd/Kconfig and mfd/Makefile records.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Recent GCC versions (e.g. GCC-4.7.2) perform optimizations based on
assumptions about the implementation of memset and similar functions.
The current ARM optimized memset code does not return the value of
its first argument, as is usually expected from standard implementations.
For instance in the following function:
void debug_mutex_lock_common(struct mutex *lock, struct mutex_waiter *waiter)
{
memset(waiter, MUTEX_DEBUG_INIT, sizeof(*waiter));
waiter->magic = waiter;
INIT_LIST_HEAD(&waiter->list);
}
compiled as:
800554d0 <debug_mutex_lock_common>:
800554d0: e92d4008 push {r3, lr}
800554d4: e1a00001 mov r0, r1
800554d8: e3a02010 mov r2, #16 ; 0x10
800554dc: e3a01011 mov r1, #17 ; 0x11
800554e0: eb04426e bl 80165ea0 <memset>
800554e4: e1a03000 mov r3, r0
800554e8: e583000c str r0, [r3, #12]
800554ec: e5830000 str r0, [r3]
800554f0: e5830004 str r0, [r3, #4]
800554f4: e8bd8008 pop {r3, pc}
GCC assumes memset returns the value of pointer 'waiter' in register r0; causing
register/memory corruptions.
This patch fixes the return value of the assembly version of memset.
Could you please review, or suggest better alternatives ?
Thanks,
--
Ivan
(this is a shorter and (hopefully) clearer repost of
http://lists.infradead.org/pipermail/linux-arm-kernel/2013-January/144916.html)
The patch adds a 'mov' instruction and merges an additional load+store into
existing load/store instructions.
For ease of review, here is a breakdown of the patch into 4 simple steps:
Step 1
======
Perform the following substitutions:
ip -> r8, then
r0 -> ip,
and insert 'mov ip, r0' as the first statement of the function.
At this point, we have a memset() implementation returning the proper result,
but corrupting r8 on some paths (the ones that were using ip).
Step 2
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 1:
save r8:
- str lr, [sp, #-4]!
+ stmfd sp!, {r8, lr}
and restore r8 on both exit paths:
- ldmeqfd sp!, {pc} @ Now <64 bytes to go.
+ ldmeqfd sp!, {r8, pc} @ Now <64 bytes to go.
(...)
tst r2, #16
stmneia ip!, {r1, r3, r8, lr}
- ldr lr, [sp], #4
+ ldmfd sp!, {r8, lr}
Step 3
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 0:
save r8:
- stmfd sp!, {r4-r7, lr}
+ stmfd sp!, {r4-r8, lr}
and restore r8 on both exit paths:
bgt 3b
- ldmeqfd sp!, {r4-r7, pc}
+ ldmeqfd sp!, {r4-r8, pc}
(...)
tst r2, #16
stmneia ip!, {r4-r7}
- ldmfd sp!, {r4-r7, lr}
+ ldmfd sp!, {r4-r8, lr}
Step 4
======
Rewrite register list "r4-r7, r8" as "r4-r8".
Signed-off-by: Ivan Djelic <ivan.djelic@parrot.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fixes:
arch/arm/boards/phycard-a-l1/lowlevel.c: In function 'pcaal1_sdrc_init':
arch/arm/boards/phycard-a-l1/lowlevel.c:105:2: warning: implicit declaration of function 'get_ram_size' [-Wimplicit-function-declaration]
arch/arm/boards/phycard-a-l1/lowlevel.c:113:3: warning: implicit declaration of function 'hang' [-Wimplicit-function-declaration]
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Using IS_ENABLED instead of #if/#ifdef the compiler can check
all the code.
Using IS_ENABLED for configuring smc->mode is an optimization,
reduce init.o text from 905 to 877.
Signed-off-by: Fabio Porcedda <fabio.porcedda@gmail.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX21 has a imx1 gpio type. Change the name accordingly, otherwise
the gpio driver does not probe successfully.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX35 has a imx31 gpio type. Change the name accordingly, otherwise
the gpio driver does not probe successfully.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
CFI Flash is currently handled outside the mtd layer which makes it
a special case. Integrate it into mtd so that we get rid of this
special status.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
not enable as on qemu this generate a undefined instruction exception
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Having the board config file in /env/init has the problem that
the settings in /env/config are overwritten in the init sequence.
This moves the config-board files to /env/ and sources them explicitly
from /env/bin/init before sourcing /env/config
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
One memory initialization will be used on any CLPS711X-target,
so move it in the common location.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
NOR-flash is placed at address 0x0, so if MMU is turned on, initialization
will fails. This patch fix this problem.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
One lowlevel initialization will be used on any CLPS711X-target,
so move it in the common location.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is a rework of CLPS711X low level initialization code which includes:
- Prepare for changing CPU PLL multiplier from board lowlevel code.
- Decrease initial memory size to 8MB. It is minimal known size.
- Fix SDRAM initialization comment about size.
- Turn off all peripherals on startup.
- Skip PLL initialization if CPU is running from external 13 MHz clock.
- Use correct CPU speed for older CPUs without PLL.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
at 0x10011000 for a9 legacy otherwise at 0x1c110000
as the new board also support Cortex-A9
so this is working
qemu/arm-softmmu/qemu-system-arm -M vexpress-a15 -m 1024 -smp 1 -kernel build/vexpress/barebox -pflash build/vexpress/flash -nographic -cpu cortex-a9
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The default setting for the imx28 watchdog is to do a power-off reset. If the
SoC is only powered via battery, then the watchdog powers the chip down, though.
According to the datasheet it should still be possible to execute a proper POR
with battery power, but testing showed otherwise.
When the watchdog power-off reset is disabled, a software reset is executed
instead. This works with and without battery power.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add the initrd start and end address to the DT, code comes from u-boot.
Signed-off-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On ArchosG9 the second stage low-level init was the fallback default.
Now that the low-level init is forcibly enabled it has to be skipped
when already executed from first stage.
Signed-off-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
detect the cpu model to dynamise the periphs mapping
currently only tested on qemu but should work on real hardware
Cortex-A9
if you use 1GiB of ram you can run the same barebox on Cortex-A15 or Cortex-A9
otherwise use vexpress_ca9_defconfig where the TEXT_BASE is at 0x63f00000
when we will add the relocation support this defconfig will be drop
qemu/arm-softmmu/qemu-system-arm -M vexpress-a9 -m 1024 -smp 1 -kernel build/vexpress/barebox -pflash build/vexpress/flash0 -nographic
Cortex-A15
qemu/arm-softmmu/qemu-system-arm -M vexpress-a15 -m 1024 -smp 1 -kernel build/vexpress/barebox -pflash build/vexpress/flash0 -nographic
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- enable USB gadget and DFU
- enable MCI and probe at boot
- enable EXT4 and FAT filesystems
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- enable the USB OTG device in gadget mode
- tested on i.MX23 EVH rev B1 with DFU
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- this patch fix MCI support and enable using the SDCard to store
the environment.
- it is fully copied from imx23-olinuxino.c
- tested on i.MX23 EVK RevB1
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch moves the register defines and bit definitions
into one include file. As the defines are common for ssp
and mci devices they can be shared.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
LAN9221 requires 50ms delay after power up. This patch adds this delay.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Board hardware revision is 1-based. This patch corrects printed value,
so now value printed in console is equal value printed on PCB.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
reset is confusing with the cpu reset and impossible to grep
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will allow to pass more paraemeter to at91sam926x_lowlevel_init
and drop AT91_BASE_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will make the code more readble
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
HAVE_CONFIGURABLE_MEMORY_LAYOUT was first meant as a feature, now it's a
feature to remove it. barebox on ARM now completely uses the memory passed
in from the lowlevel code and configures the malloc area and stack space
during runtime making it obsolete to hardcode these values.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This optionally enabled the MMU in the PBL or during early startup for
the non PBL case. The regular MMU init code will pickup the already enabled
MMU later. This might complicate debugging early code, so this has been
made optional.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move early mmu code to a separate file so that it can be
used from the pbl and the regular image. Disabling the mmu
can be dropped since the regular mmu code is now able to
pickup an enabled mmu.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This switches the at91sam926x, 9g10 and 9g20 over to barebox_arm_entry.
For these SoCs we currently support reading back the memory size from
the SDRAM controller, so all of these can have a common reset() function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This architecture is a bit strange. It has up to four SDRAM banks, but
all have a quite limited size. The SDRAM size for the different boards
currently is unknown as it's configurable with Kconfig. We use a SDRAM
size based on the value of the only board we have in the defconfigs:
edb9301. This likely breaks other ep93xx boards.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All Samsung boards automatically detect their SDRAM size. The size detection
code can't be called safely from lowlevel C code, so instead the minimum SDRAM
size is guessed from the defconfig files.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All boards use hardcoded SDRAM addresses, copied from the board init file.
OMAP3 boards are a bit special, they had a SoC specific reset() function. This
is renamed to omap3_invalidate_dcache() and called from the board lowlevel init
code now.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Most i.MX boards can use the imx*_barebox_entry functions. The remaining
(i.MX21, i.MX6) use hardcoded base addresses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i.MX will get SoC specific entry points for barebox. To find the
correct one we have to call these from the SoC specific
imx*_barebox_boot_nand_external functions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Additionally to the generic entry point the i.MX specific ones
calculate the SDRAM size automatically so the boards do not have
to care.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Several i.MX boards setup a temporary stack in their lowlevel code.
Instead of using STACK_BASE use a stack in internal SRAM to get rid
of the STACK_BASE compile time dependency.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Memory is a precious resource, so it makes sense to make it available as
early as possible. By definition the lowlevel init code already knows where
to find memory because it's the lowlevel init code which sets up the memory.
Until all boards are converted this new entry is just a fallback to the old
entry point.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will require to update the bootstrap
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
it's currently working by luck
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This will allow to change the boot mode
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some SoC as sam9261 or sam9263 have enough sram to directly load a barebox
from external boot.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
the sam9x5 have multiple overlay but only register the base one
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
the sam9x5 have multiple overlay but only register the base one
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
add BAREBOX_MAX_IMAGE_SIZE and rebuild defconfig with savedefconfig
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as we will add later the GMAC IP verion support (GEM)
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This IP is present on the at91sam9 until the sam9g45, on the sam9x5 we use a
new IP.
This driver is based on the linux one.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
we have only 32MiB of sdram
by luck it was working
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Jean-Christophe PLAGNIOL-VILLARD
Maxime Ripard
Alexander Shiyan
Fabio Porcedda
Eric Bénard
Ivan Djelic
Steffen Trumtrar
Hubert Feurstein
Vicente Bergas
Michael Grzeschik
George Pontis
Michael Olbrich
Jan Weitzel
Antony Pavlov