this will also fix the clock support as we now switch to allocated generic
device
as we can need to associate the clock and the device but the driver is probe
before the association
we also change the atmel serial name to "atmel_usart" to simplify sharing with
linux
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On several boards without MMU support the vectors cannot be mapped
to 0x0 and exception support is nonfunctional anyway, so make this
configurable.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We never supported the sigmatel stm chips and probably
never will. So do the first step and rename the architecture
to mxs just like in the kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
from linux kernel v2.6.37
This patch adds various C and assembler macros that help with using
the unified assembler syntax for compiling files to either ARM or
Thumb-2 modes.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
tested with qemu only
qemu-system-arm -M versatilepb -monitor null -kernel barebox -net nic -net user -tftp "<uImage-path>/" -serial stdio
add -nographic if you do not want the lcd via sdl
Signed-off-by: Alexey Zaytsev <alexey.zaytsev@gmail.com>
update:
- use default env
- move arm_timer.h as in the kernel
- add nor flash support
- udpate defconfig
- fix copyright copy from linux
- fix ARCH_TEXT_BASE
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds genetic GPIO support to all S3C2440 processor based systems.
Also it adds definitions to setup the pin multiplexer in a way the other
architectures do.
Note: Tested on a S3C2440 based system only. But should work on an S3C2410, too.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These CPUs are called "i.MX", but they are of type STM378x from SigmaTel. They
do not share any devices with the other i.MX CPUs, so we need a separate
architecute directory to handle them without an ifdef hell in the native i.MX
files.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
as refer in this patch "arm & sh: factorised duplicated clkdev.c"
factorise some generic infrastructure to assist looking up struct clks
for the ARM & SH architecture.
as the code is identical at 99% in linux
move it also as preparing for the SH adding
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
this will be re-add as mach-at91
for now on keep the net driver which will be updated to new API
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The tags for the command line parameters are not used, so let's remove them:
- CMDLINE_TAG
- SETUP_MEMORY_TAGS
- INITRD_TAG
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
instead of select first the board which will select the arch, now
first choice the arch to filter the possible boards
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
instead of select first the board which will select the arch, now
first choice the arch to filter the possible boards
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
instead of select first the board which will select the arch, now
first choice the arch to filter the possible boards
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
instead of select first the board which will select the arch, now
first choice the arch to filter the possible boards
as it's already done for omap
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The generic A9M2440 comes in many SDRAM variantes. Two GPIO pins describing
the populated SDRAM devices. This patch adds some code to query the setting
and setup a correct SDRAM configuration out of four possible variants.
Due to the lack of hardware the 16 MiB and 128 MiB case is untested yet.
Due to the 32 MiB configuration we must link the u-boot-v2 always to
address 0x31fc0000. Even for the 64 MiB and 128 MiB configuration.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
CPUIMX27 is built around Freescale's i.MX27 and has up to 64MB of
NOR Flash, up to 512MB of NAND Flash and up to 256MB of mDDR,
it includes an ethernet PHY in MII mode, an I2C RTC and a
ST16554 QuadUART on nCS3.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It includes a
- driver for the internal UART
- driver for the internal NAND controller
- support to boot from NAND
- PLL handling
- SDRAM initialisation
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
We used to initialize the PLLs on PCM038 in two
steps. The first was to initialize a basic setup
so that all peripheral clocks run at their final
speed and the second step was to push the processor
to full speed after the PMIC has been initialized
for the higher voltage.
Do this in one step instead to get an easier setup.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Jean-Christophe PLAGNIOL-VILLARD
Sascha Hauer
Juergen Beisert
Alexey Zaytsev
Juergen Beisert
Marc Kleine-Budde
Matthias Kaehlcke
Robert P. J. Day
Eric Benard
Juergen Beisert
Ivo Clarysse