Correct the pinmux configuration for the chip-select GPIOs. This fixes
detection of the first SPI NOR-flash after barebox itself got loaded from
there.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This introduces the bitsperlong.h file for the remaining architectures.
It's purpose is to define BITS_PER_LONG which in the next step can be used
by a generic posix_types.h file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch will reduce the size of the MLO images.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
AM335x's MLO size limit is 109K.
The am33xx.dtsi file adds spare and never used nodes to the dtb.
With this patch we add a file to remove the unused nodes and reduce the
size of the dtb.
Including this file will reduce the lzo packed MLO size about 6K.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The kernel has __BITS_PER_LONG and BITS_PER_LONG. The formaer
is needed for architectures which support 32bit userspace on a
64bit kernel. This is not relevant for barebox, so drop
__BITS_PER_LONG and use BITS_PER_LONG only.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of letting all architectures define their own dma_addr_t use
a common place in include/linux/types.h and use a Kconfig symbol that
architectures can select to define the width of dma_addr_t. The same
is done in the Kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit 2e6a88f210 (add cpu native ordered io accessors) introduced
these macros and then commit be57f20cdd (Fix big endian MMIO
primitives) figured out they are equivalent to __raw_{read,write}*.
They turned out unnecessary after all. Anyway, most source files
use __raw_read* and __raw_write*.
Let's replace a few remaining references and abolish them.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit 461f8cfc7e renamed the SCRM compatible
string in am33xx.dtsi and breaks all am335x based boards.
Rename the SCRM compatible string.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This errata workaround was introduced for i.MX6Q, i.MX6D and i.MX6SL.
Old revisions of i.MX6s chips had no problems with the PFD resets.
In a newer i.MX6s revision I had issues with this code when booting in
internal boot mode from NAND or in serial downloader mode. FUSE mode
worked fine although it jumped directly to serial downloader mode.
This patch executes the PFD workaround only for i.MX6Q and i.MX6D which
fixes the issues I saw.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit add a very basic code to allow Barebox to be booted from
IRAM. Given that the amount of IRAM on most i.MX variants is
insufficient to contain a copy of Barebox with any reasonable degree
of functionality this code uses IRAM only as a temporary location and
eventually bootstraps from DRAM. But the presense of the intermediate
IRAM-only stage allows to add provisions to test the area of DRAM that
Barebox would be using to facilitate various testing scenarious.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Make 'check_file_size' more flexible by not hardcoding the file whose
size is going to be checked to '$@'. This way it is possible to use
this subroutine to check the size of files other than the target of
the rule.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move all of the common clock ungating code in early UART
initialization into a dedicated subroutine that can be shared by all
of the users.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
NOTE: Boards 'karo-tx25' and 'tqma53' can benefit from this
refactoring as well, but they were not converted because of the lack
of i.MX25 or i.MX53 based hardware to test on.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Convert PUTC_LL to use IOMEM instead of explicit casting to 'void *',
since the former seem to be more appropriate to the situation.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It appears that all i.MX51 and i.MX6 based boards that support early
debug output inevitably do exactly the same thing with the registers
of the UART peripheral. So to avoid code duplication three new
subroutines are introduced:
- imx_uart_setup_ll() that allows user to perform aforementioned
"same thing" on any arbitrary UART at 'uartbase' and clocked at
'refclock' Hz.
- imx6_uart_setup_ll() and imx5_uart_setup_ll() that do those
actions assuming UART to be the one specified in configuration and
'refclock' to be equal to what it is when SoC comes out of reset.
NOTE: Please note that 'imx*_uart_setup_ll' functions do add a slight
difference in behaviour by dropping the initialization of ONEMS and
UESC registers since those do not seem to be needed for early UART
functionality
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move UART definitions into a separate file to avoid redefinition in
<mach/debug_ll.h> and magical constants in low level UART
initialization code.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The variable name misses a CONFIG_ prefix to work as expected.
Fixes: 05a1e4b ARM: i.MX5: Do not register fixed clocks twice
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit makes it possible to have unified debug_ll_*
assembler routines for differrent UART program model.
E.g. we can use debug_ll_putc() routine in common
code without knowledge on exact UART model: ns16550
or ar933x.
Also rename *_check_char -> *_tstc.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since 2011 barebox' of_device_id struct uses unsigned long type for data field:
struct of_device_id {
char *compatible;
unsigned long data;
};
Almost always struct of_device_id.data field are used as pointer
and need 'unsigned long' casting.
E.g. see 'git grep -A 4 of_device_id drivers/' output:
drivers/ata/sata-imx.c:static __maybe_unused struct of_device_id imx_sata_dt_ids[] = {
drivers/ata/sata-imx.c- {
drivers/ata/sata-imx.c- .compatible = "fsl,imx6q-ahci",
drivers/ata/sata-imx.c- .data = (unsigned long)&data_imx6,
drivers/ata/sata-imx.c- }, {
Here is of_device_id struct in linux kernel v4.0:
struct of_device_id {
char name[32];
char type[32];
char compatible[128];
const void *data;
};
Changing of_device_id.data type to 'const void *data' will increase
barebox' linux kernel compatibility and decrease number of 'unsigned
long' casts.
Part of the patch was done using the 'coccinelle' tool with the
following semantic patch:
@rule1@
identifier dev;
identifier type;
identifier func;
@@
func(...) {
<...
- dev_get_drvdata(dev, (unsigned long *)&type)
+ dev_get_drvdata(dev, (const void **)&type)
...>
}
@rule2@
identifier dev;
identifier type;
identifier func;
identifier data;
@@
func(...) {
<...
- dev_get_drvdata(dev, (unsigned long *)&type->data)
+ dev_get_drvdata(dev, (const void **)&type->data)
...>
}
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Update mvebu_defconfig to cover recently introduced Lenovo ix4 and
its related drivers.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for Marvell Armada XP based 4-bay NAS Lenovo
Iomega ix4-300d.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Before adding new Armada XP based boards becomes messier than necessary,
sort Armada XP based board Kconfig and image Makefile alphabetically.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With proper defines for ARMADA_370_XP_FABRIC_CTRL and MBUS_ERR_PROP_EN
make use of it.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit 6638760c22
("ARM: mvebu: Enable PUP register")
correctly enables devices that are disabled after boot-up due to
some Design For Testability registers.
However, although harmless on Armada 370, call the code conditionally
on Armada XP only. While at it, move PUP register defines to SYSCTL
registers where they belong to.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Marvell Armada XP MV78230-A0 incorrectly identifies itself as MV78460.
Check number of CPUs in FABRIC_CONF and fixup PCIe DEV_ID when it is
2 CPUs instead of 4.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To prepare PCIe device id fixups, move PCIe register defines
to a common location.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Registering mbus driver as platform driver is a little late for
some register accesses to work. We have to make sure boot-up
mbus windows are disabled early, so call mbus driver directly
from SoC init.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The board code uses quite a few OF functions and it doesn't seem
reasonable to run this board without DT support.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The board code uses quite a few OF functions and it doesn't seem
reasonable to run this board without DT support.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds high assurance boot support (HABv4) image generation to
barebox, currently tested on i.MX6 only.
In order to build a signed barebox image, add a new image target to
images/Makefile.imx as illustrated in the diff below:
- - - a/images/Makefile.imx
+ + + b/images/Makefile.imx
@@ -163,10 +163,14 @@ image-$(CONFIG_MACH_SABRELITE) += barebox-freescale-imx6dl-sabrelite.img
pblx-$(CONFIG_MACH_SABRESD) += start_imx6q_sabresd
CFG_start_imx6q_sabresd.pblx.imximg = $(board)/freescale-mx6-sabresd/flash-header-mx6-sabresd.imxcfg
FILE_barebox-freescale-imx6q-sabresd.img = start_imx6q_sabresd.pblx.imximg
image-$(CONFIG_MACH_SABRESD) += barebox-freescale-imx6q-sabresd.img
+CSF_start_imx6q_sabresd.pblx.imximg = $(havb4_imx6csf)
+FILE_barebox-freescale-imx6q-sabresd-signed.img = start_imx6q_sabresd.pblx.imximg.signed
+image-$(CONFIG_MACH_SABRESD) += barebox-freescale-imx6q-sabresd-signed.img
+
Here the default i.MX6 CSF file $(havb4_imx6csf) is used, it's generated during
build on from the template "scripts/habv4/habv4-imx6.csf.in". You can configure
the paths to the SRK table and certificates via: System Type -> i.MX specific
settings -> HABv4 support.
The proprietary tool "cst" by Freescale tool is expected in the PATH.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
the clko pins are general purpose clock outputs. Add support for them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for the Intel XScale PXA270 development system platform.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
They are upstream now and unfortunately actively break some boards
as they are using a different alias numbering in the kernel.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
linux arm sha256 current
$ ls -al build/versatilpb/arch/arm/pbl/zbarebox.bin
-rw-r--r-- 1 root root 207786 Mar 24 13:23 build/versatilpb/arch/arm/pbl/zbarebox.bin
linux arm v4 asm implementation for sha256
$ ls -al build/versatilpb/arch/arm/pbl/zbarebox.bin
-rw-r--r-- 1 root root 205007 Mar 24 16:47 build/versatilpb/arch/arm/pbl/zbarebox.bin
we win 2779 bytes and speed cf code
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
from Linux 3.9
linux generic implementation
$ ls -al build/versatilpb/arch/arm/pbl/zbarebox.bin
-rw-r--r-- 1 root root 210829 Mar 24 13:21 build/versatilpb/arch/arm/pbl/zbarebox.bin
linux arm v4 asm implementation
$ ls -al build/versatilpb/arch/arm/pbl/zbarebox.bin
-rw-r--r-- 1 root root 207786 Mar 24 13:23 build/versatilpb/arch/arm/pbl/zbarebox.bin
we win 3043 bytes and speed cf code
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This will allow to have hw driver or asm optimised driver.
Use a priority level to determine which one to use at runtime.
The generic one will be 0.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Recent binutils versions assume that the v7 security
extensions are not available by default. They need to be enabled
explicitly if code wishes to use instructions defined by them.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for the i.MX6 based Eltec HiPerCam board.
This board comes with different i.MX6 flavours and different
memory sizes. Currently supported is the i.MX6dl version with
256MB DDR3 RAM.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This clock is not specified in the devicetree node, thus is missing
since we switched to of based clocks for i.MX6. Add this clock back
as physbase clk to make the ocotp driver work again.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for two gates from can only exclusively be enabled.
Based on the corresponding Linux code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The bus implementations currently call the drivers remove
hook unconditionally, but this hook is seldomly populated. Only call
it when it's actually populated.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We do not pass the ip to kernel any more. So remove adding
it to bootargs when booting from nand, mmc or spi nor.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fixes the build with a minimal config while maintaining
functionality of the board.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Selecting the serial driver breaks the build with CONFIG_SERIAL_NONE.
Move it to the defconfig of the board instead, like we do on other
boards.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some drivers depend on this symbol and this fixes a failure
to link them.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use linux.bootargs.console to specify the console since this
is the variable the console code uses for automatically assigning
a console.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Boards like phyBOARD-WEGA-rdk do not have SPI Flash.
The compatible string was not updated when merging all phytec
am335x SOMs to one board file.
Updating this now.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Antony Pavlov
Lucas Stach
Sascha Hauer
Steffen Trumtrar
Wadim Egorov
Marc Kleine-Budde
Masahiro Yamada
Markus Pargmann
Andrey Smirnov
Oleksij Rempel
Sebastian Hesselbarth
Robert Jarzmik
Jan Luebbe
Jean-Christophe PLAGNIOL-VILLARD
Teresa Gámez
Bo Shen
Andrey Panov