After adding the base support, the SoC can now be enabled in the build system.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The S3C64XX SoC has a real 32 bit counter, but almost the same style of
registers. It's enough to change the parameters, to get the routines work on
this SoC.
sha: s5p timer works like s3c64xx, so use #else to cover this.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
More or less just cosmetic (removing ifdefs!).
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The other SoCs differs in many ways from the currently supported S3C2410 and
S3C2440, so remove them.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Although the spi chipselects should really be const, there is no
good way to fix the compiler warning, so remove the const.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some drivers use gpio_request/gpio_free. Currently no architecture
has code behind these functions. Provide static inline functions
for these and remvoe the at91 specific inline functions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We need inline versions of armlinux_set* exactly when
CONFIG_ARM_LINUX is not set, because this is the symbol
used to compile the non inline versions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This fix a clock inaccuracy in get_time_ns (used by sleep, time, etc).
At i.MX53 power-on GPT clock is typically 55500000 Hz, and it will be used
to calc the clock multiplier. After call imx53_init_lowlevel() GPT clock
will changed (e.g. to 66666666 Hz), but multiplier not. To fix this behavior call
clock_notifier_call_chain() after changing clock in imx53_init_lowlevel().
Signed-off-by: Wjatscheslaw Stoljarski <wjatscheslaw.stoljarski@kiwigrid.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
start.c has nothing to do with the exception vector table anymore,
so move it next to the exception handling code in exceptions.S
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Procedure is missing, so remove its declaration.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With compressed image support TEXT_BASE will become the base
address of the uncompressed image. What the boards want instead
is the base address of the decompressor code or, if not compressed,
the base address of the uncompressed image. Use _text which is
the correct one for both cases.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ep93xx needs a special value at offset 0x1000. Rather than
do special handling in the linker file add aa header section
as done on i.MX.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Calculating the offset between runtime and linked address makes the
intention of the binary copy function a bit more clear.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The exception vector table will become part of the uncompressed image,
so we can't reference them from the lowlevel init stuff anymore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since commit 2f6b1f7690 the pull-up and
bitkeeper handling for i.MX23/28 is correct. But now it is important to
distinguish these pin features as their programmed bit values are different.
With this patch the bitkeeper and pull-up enable/disable bits are now handled
separately.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
A look into "arch/arm/boards/" offers various boards starting with the
vendor's name in their directory name (like 'eukrea' and 'freescale').
This patch does the same for the currently existing FriendlyARM board
Mini2440.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
This patch provide setup for SPI clk frequency global to driver.
For MC13783 maximum clock frequency is 20 MHz,
for MC13892 maximum clock frequency is 26 MHz,
so we define 20 MHz as a maximum SPI clk.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Here is a test output:
barebox 2012.07.0-00136-ge3ab4bc-dirty #23 Tue Jul 3 23:10:44 MSK 2012
Board: Phytec phyCORE-i.MX27
mc13xxx-spi@mc13xxx-spi0: Found MC13783 ID: 0x00009b [Rev: 3.1]
cfi_flash@cfi_flash0: found cfi flash at c0000000, size 33554432
NAND device: Manufacturer ID: 0x20, Chip ID: 0x36 (ST Micro NAND 64MiB 1,8V 8-bit)
Bad block table found at page 131040, version 0x01
Bad block table found at page 131008, version 0x01
imxfb@imxfb0: i.MX Framebuffer driver
cfi_protect: protect 0xc0080000 (size 1048576)
Using environment in NOR Flash
Found NXP ISP150x ULPI transceiver (0x04cc:0x1504).
ehci@ehci0: USB EHCI 1.00
imx-mmc@mci0: registered as mci0
Malloc space: 0xa6f00000 -> 0xa7efffff (size 16 MB)
Stack space : 0xa6ef8000 -> 0xa6f00000 (size 32 kB)
running /env/bin/init...
Hit m for menu or any other key to stop autoboot: 3
type exit to get to the menu
barebox@Phytec phyCORE-i.MX27:/ mci0.probe=1
mci@mci0: registered disk0
barebox@Phytec phyCORE-i.MX27:/ devinfo mci0
resources:
driver: mci
Card:
Attached is an SD Card (Version: 1.10)
Capacity: 1962 MiB
CID: 1C535653-44432020-1000013C-7E007200
CSD: 005E0032-5F5A83D5-2DB7FFBF-96800000
Max. transfer speed: 25000000 Hz
Manufacturer ID: 1C
OEM/Application ID: 5356
Product name: 'SDC '
Product revision: 1.0
Serial no: 81022
Manufacturing date: 2.2007
Parameters:
probe = 1
barebox@Phytec phyCORE-i.MX27:/ mkdir /d
barebox@Phytec phyCORE-i.MX27:/ mount /dev/disk0.0 fat /d
barebox@Phytec phyCORE-i.MX27:/ ls /d
barebox.bin
barebox@Phytec phyCORE-i.MX27:/
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This configuration can be used to use barebox as
x-loader replacement.
Also the ECC-Mode is changed from SOFT to BCH8.
Signed-off-by: Juergen Kilb <J.Kilb@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add reset to gpmc_generic_init as proposed by TRM.
This also fixes some strange timing issue while GPMC Initialization for
NAND OMAP4460
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Barebox crashes since it has trouble with a resource size of 0. Most of the
S3C24XX based platforms crashes at runtime and can't use devices with resource
sizes of 0 anymore. This patch fix it by unifying the device registration for
all current Barebox's S3C24XX based platforms.
- A9M2410 and A9M2440 compile time tested only.
- Mini2440 also runtime tested.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
While a set bit enables the pullup (if exists) it disables the bitkeeper (if
exists). Both features are using the same register bit and only one of this
feature is present on a per pin base.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We have the following in the tree:
|commit af42feb9d2
|Author: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
|Date: Mon Jan 2 11:49:17 2012 +0100
|
| ARM: set SCTRL[A] only when architecture does not support unaligned access
|
| Recent gcc generates code with unaligned access when architecture
| supports it. Setting A bit unconditionally causes data-aborts on such
| code rendering barebox unusable.
|
| Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
| Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
What the patch tried is correct: We should set the A bit only when the architecture
does not support unaligned accesses. To figure out whether the architecture supports
unaligned accesses the patch tested for the U bit which is wrong. The U bit may be
0 after a reset, so instead of testing for the U bit we have to set it. This can
be done on armv6 and later. All others have the A bit set to trap unaligned accesses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This image header is used for booting from SPI using the TI User
Boot Loader (UBL).
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Storing the size instead of the resource end in struct resource was
a mistake. 'size' ranges from 0 to UINT[32|64]_MAX + 1 which obviously
leads to problems. 'end' on the other hand will never exceed
UINT[32|64]_MAX. Also this way we can express a iomem region covering
the whole address space.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since we now can change HCLK and VDDIO, we can now support writing to
OCOTP. Writing is done via a special data register. This is u32, so we
need to fill a temporary buffer when offset or count is not aligned. The
write is also protected by a special device variable.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Will the code more readable, especially since future additions are
planned.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Let's keep the timeout routine in a central place. We will need it more
often when we add write support.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
usbphy initializaion needs to access the power supply and has this
embedded. Refactor to a seperate power.c, since we need other accesses
in the future.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently the watchdog is occupied for system reset. This usage collides with
the dedicated usage of a watchdog. This patch change the behaviour of at least
i.MX23/i.MX28 where the chipset supports a simple and powerful alternative
to reset the whole SoC (including the PMIC).
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We write a proper FCB, but no DBBT since it is unresolved how to keep it
in sync with Linux-based BBTs. Also, we imply searchcount = 4 and stride
= 64 (which is the default) until we can verify via ocotp.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Based on the U-Boot version. Changed to kernel style register layout, added
MX23 support (WIP!), made MMU aware and adapted to barebox.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Based on the U-Boot version. Changed to kernel style register layout, added
MX23 support, made MMU aware and adapted to barebox.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To avoid getting a different divider due to rounding errors when using
set_hclk later, use DIV_ROUND_UP for the returned value.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This change is necessary because valid source argument for the clko command
can be negative.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
dma_alloc() allocates memory aligned to cache lines. We have to use
cache line aligned buffers if a driver calls dma_inv_range on the
buffer.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch add dma_alloc to existing dma-mapping.h. On nios the mem is
aligned to D_ACHE_LINE_SIZE.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some drivers call dma_inv_range() on buffers, on arm these buffers must
be cache line aligned. This patch introduces a generic dma_alloc,
dma_free. Archs can implement in their own functions in "asm/dma.h" and add a:
#define dma_alloc dma_alloc
#define dma_free dma_free
On all other archs the generic versions, which translate into xmalloc
and free are used.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds support for ConnectCore® i.MX51 board from Digi International.
A separate option includes support for debugging board for this module.
Some code taken from the bootloader U-Boot and patch from Digi.
Functional of Ethernet not tested yet.
barebox 2012.05.0-00316-g4024d9c-dirty #0 Wed Jun 6 13:08:25 MSK 2012
Board: ConnectCore i.MX51
Module Variant: i.MX515@600MHz, PHY, Acceleromter (0x0b)
Module HW Rev : 02
Module Serial : B111156789
mc13xxx-spi@mc13xxx-spi0: Found MC13892 ID: 0x0045d0 [Rev: 2.0a]
NAND device: Manufacturer ID: 0x2c, Chip ID: 0xda (Micron NAND 256MiB 3,3V 8-bit)
Bad block table found at page 131008, version 0x01
Bad block table found at page 130944, version 0x01
nand_read_bbt: Bad block at 0x00ce0000
nand_read_bbt: Bad block at 0x05bc0000
nand_read_bbt: Bad block at 0x0bc40000
ehci@ehci0: USB EHCI 1.00
detected i.MX51 rev 3.0
imx-esdhc@mci0: registered as mci0
imx-esdhc@mci1: registered as mci1
Malloc space: 0x95f00000 -> 0x97efffff (size 32 MB)
Stack space : 0x95ef8000 -> 0x95f00000 (size 32 kB)
envfs: wrong magic on /dev/env0
no valid environment found on /dev/env0. Using default environment
running /env/bin/init...
Hit any key to stop autoboot: 3
barebox@ConnectCore i.MX51:/
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The 40 KHz frequency value was used to parry
__lshrdi3() error on little-endian MIPS because
the __lshrdi3() function is used in clocksource code.
The true value of the JZ4755's external clock frequency is 24 MHz.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Several boards are getting bigger than their specified maximum binary
size of 256Kb. Enable the TLSF allocator for them which is smaller
than the original dlmalloc. The changed defconfigs are:
eukrea_cpuimx25_defconfig
eukrea_cpuimx35_defconfig
eukrea_cpuimx51_defconfig
usb_a9260_defconfig
usb_a9263_128mib_defconfig
usb_a9263_defconfig
usb_a9g20_128mib_defconfig
usb_a9g20_defconfig
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To get symbols like __ashrdi3.
Franck started generating these symbols from gcc assembly, which seems
to be the cleaner approach. The simpler approach for now to get additional
symbols is to link in libgcc, which is the same as the kernel does.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Franck Jullien <franck.jullien@gmail.com>
On x86_64 we need CONFIG_PHYS_ADDR_T_64BIT to make the resource sizes
64bit. The kernel has this as a Kconfig variable, but on barebox sandbox
will build with whatever compiler we find, so we can't put it into Kconfig.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We already have a phys_size_t since:
commit 2f05b69256
Author: Renaud Barbier <renaud.barbier@ge.com>
Date: Fri May 11 11:58:13 2012 +0100
linux/types.h: define phys_size_t
Add this definition in preparation for the introduction of the
mpc85xx support.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix build due to redefinition of this type.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In the commit 40492a0c13
(MIPS: add common header file for DEBUG_LL via NS16550)
introduced common DEBUG_LL via NS16550 for MIPS
(see file arch/mips/include/debug_ll_ns16550.h).
In the commit 1cbe2b2c00
(MIPS: XBurst: add Ritmix RZX-50 board support)
the file debug_ll_ns16550.h used in
the file arch/mips/mach-xburst/include/mach/debug_ll.h.
Usage looks like this:
------------------------------------------------
+#ifdef CONFIG_BOARD_RZX50
+#include <mach/debug_ll_jz4755.h>
+#endif
+
+#include <debug_ll_ns16550.h>
------------------------------------------------
So after adding another board (e.g. A320) we will have something like this:
------------------------------------------------
#ifdef CONFIG_BOARD_RZX50
#include <mach/debug_ll_jz4755.h>
#endif
+#ifdef CONFIG_BOARD_A320
+#include <mach/debug_ll_jz4740.h>
+#endif
#include <debug_ll_ns16550.h>
------------------------------------------------
This approach has disadvantage:
* the files mach/debug_ll_jz4740.h and mach/debug_ll_jz4755.h
(they go to arch/mips/arch-xburst) are __BOARD-SPECIFIC__
(not SOC- or mach-specific!); The file mach-xburst/include/mach/debug_ll.h
is outside board directory, but it contains some board related information.
This commit introduce a more suitable solution.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch makes possible to put a board-specific
header file (e. g. foobar.h) to arch/mips/boards/*/include/board/.
Header file usage:
#include <board/foobar.h>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We must check pointer to function rather than result.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this allow to save between 100 to 300 bytes
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
with:
- led
- USB Device
- uart
- net
- mmc
- MMU
dfu support
detect it at boot time
if the user button is pressed 5s and the vbus is 1 start the dfu
otherwise the vbus is 1 start usb serial
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently, both SDHC clock source is PLL3. We can raise clock
for SDHC driver by change source from PLL3 to PLL2.
Below, is debug ouputs with old and new settings.
Detection (PLL3):
set clock: wanted: 400000 got: 375000
Operation (PLL3):
set clock: wanted: 25000000 got: 18000000
Operation SD4.0 (PLL3):
set clock: wanted: 52000000 got: 27000000
Detection (PLL2):
set clock: wanted: 400000 got: 399639
Operation (PLL2):
set clock: wanted: 25000000 got: 23750000
Operation SD4.0 (PLL2):
set clock: wanted: 52000000 got: 41562500
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
fixes
arch/arm/mach-samsung/Kconfig:95:warning: config symbol defined without type
Until we actually have board support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Traditionally we call __mmu_cache_flush in early startup. There
is a problem with armv7 and hierarchical caches though, on these
systems __mmu_cache_flush uses the stack. Appearantly this was
seldomly a problem, because most of these systems have a ROM
bootloader which sets up some stack, but on a special i.MX6 system
this failed badly. We should not have to flush caches here. Every
sane system should pass control to the bootloader without stale
entries in the caches *), so it should be a safe assumption that the
cache flush can be removed.
Since __mmu_cache_flush is not called from early code anymore we can
also move it to the regular text section.
Be brave and give it a try.
*) omap3 seems to be a exception to this, but this has a cache flush
in arch_init_lowlevel already
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Added support for CompactFlash cards for PCM970 development board via
PCMCIA window.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Register GPIO7 as heartbeat LED, same as in the linux kernel.
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add i2c-omap and twlcore driver to panda board.
(Based on similar patch for pcm049).
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If barebox is not used as the MLO, then it crashes during boot
with the below error message:
Board: Texas Instrument's Panda
PandaBoard Revision: 003
omap-hsmmc@mci0: registered as mci0
unable to handle paging request at address 0x4a064010
pc : [<8f01e820>] lr : [<8f0049a0>]
sp : 8cffff80 ip : 00000016 fp : 00100103
r10: 00000000 r9 : 00000ae7 r8 : 4030b76c
r7 : 40300200 r6 : e28f8028 r5 : 0000003e r4 : 00000000
r3 : 4a064000 r2 : 00000014 r1 : 00000001 r0 : 00000001
Flags: nzCv IRQs off FIQs off Mode SVC_32
[<8f01e820>] (panda_devices_init+0x17c/0x1e0) from [<8f006300>] (start_barebox+0x18/0x10c)
[<8f006300>] (start_barebox+0x18/0x10c) from [<8200006c>] (0x8200006c)
[<8f021248>] (unwind_backtrace+0x0/0x98) from [<8f011a00>] (panic+0x28/0x3c)
[<8f011a00>] (panic+0x28/0x3c) from [<8f02171c>] (do_exception+0x10/0x14)
[<8f02171c>] (do_exception+0x10/0x14) from [<8f021784>] (do_data_abort+0x2c/0x38)
[<8f021784>] (do_data_abort+0x2c/0x38) from [<8f021470>] (data_abort+0x50/0x60)
This is because the USBHOST module is not enabled. The module enable
is is normally done in mach-omap/xload.c which never gets called.
Since we're configuring the USBHOST CLKCTRL register in the board file
anyway, we might as well explicitly enable the module in the same place.
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This switches the pcm038 board to the new environment template and
does the necessary defaultconfig adjustments. Additionally it disables
UBI support as the pcm038 image is getting bigger and bigger and UBI
seems to be the most unused big (in size) feature.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this patch also cleans the source by putting in device_init
the code which is actually in console_init and has nothing
to see with the console.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
else USB device doesn't work as the hardware fix is present on the
boards
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is limited board support for the Freescale P2020RDB in single CPU
mode. The DDR is configured for a memory bus running at 667Mhz.
The system boots from NOR flash and provides the console at 115200
bauds, no other drivers are included.
Finally, the PPC Kconfig and make file make the building of
the P2020RDB platform firmware possible.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Kconfig and Makefile allow to include the 85xx cpu support in the
compilation process.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
_text_base assignment has been removed earlier from lib/board.c
for the mpc5xxx.
For the 85xx, _text_base is set to where the firmware relocates
in memory as passed by the function input variable.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds initialization functions used by the e500v2 start-up code
and board specific code (L2 cache initialization).
Other functions help identify the CPU or return the programmed memory size.
Finally, the Makefile and Kconfig file are added.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch contains functions that returns information on
the CPU and buses frequency (LBC, DDR, system).
It also includes the clock source driver.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch includes functions to initialize LAW registers and
the chip select 0 of the CPU.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch defines functions to set interrupt vector registers and
functions to handle hardware exceptions.
It also defines support functions to set and search TLBs.
Finally, the Makefile is added.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is the first part of the start-up code. The source code origin is
U-boot and is slightly modified to have e500v2 CPU support in 32-bit
mode only.
It includes the power-up entry point, CPU initialization code and
exports definition for D-cache flush and I-cache invalidate.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These header files are added to provide a minimal support to the
Freescale 85xx cpu to boot on a P2020RDB platform.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch reflects real naming of SPI by Freescale.
We have two ECSPI channels and one CSPI.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Among other things the power initialization also turns on power
for the ethernet phy, so register the fec after power init.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add a check to verify if /barebox.BIP0 exists, and if so,
unlock the protection area, flash barebox, and reprotect the
area.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To speed-up linux kernel loading, switch the PXA cpu to the
maximum allowed frequency (520 MHz). This improves the load
time from several seconds to less than a second from the
MTD.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In order for barebox to be functional, the docg3 DPS1 has to
protect barebox from writes, and have its embedded IPL coded
to load barebox (as barebox is the SPL).
Add a raw DPS1, which :
- protects the area from block 6 to block 123
This is DPS1 + barebox + barebox-logo
- encodes the 2048 bytes IPL
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Make the autoboot work :
- if no USB cuable is plugged, continue directly to
autoboot
- if an USB cable is plugged, wait for 3 seconds for
any input on the USB serial gadget, and if none
happens, continue to autoboot linux kernel
- else interrupt autoboot and interact on barebox
console
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Recent evolutions of linux kernel's drivers for docg3 chip,
ie. it's renaming for mtdparts option, is handled by this
patch.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This got broken while updating the iomux definitions from the
kernel. Since then the PMIC did not work anymore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The value already is set by calling gpio_direction_output.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Ok, I assume this should go into separate series. It fits both S5PV210 and S3C6410.
This adds support for S3C and S5P architectures (all of my knowledge) to the
serial driver. Since the only difference between them is in clock handling,
this is moved to an arch-dependent separate function.
Most modern architectures should define S3C_UART_HAS_UBRDIVSLOT and S3C_UART_HAS_UINTM.
This adds support for most
Signed-off-by: Alexey Galakhov <agalakhov@gmail.com>
Signed-off-by: Juergen Beisewrt <kernel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Actually ISP1504 ULPI chip are installed on PCM970 development board.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We currently use the environment variable 'bootargs' to get the
Linux bootargs. This patch allows for a more flexible bootargs
generation using global variables. With it the Linux bootargs
are concatenated from multiple variables. This allows to replace
parts of the bootargs string without having to reconstruct it
completely.
With this bootargs can be constructed like:
global linux.bootargs.base="console=ttyS0,115200"
global linux.bootargs.ip="ip=dhcp"
global linux.mtdparts="physmap-flash.0:512K(nor0.barebox),-(root)"
This will then automatically be combined into a kernel bootargs
string during boot.
If the 'linux.bootargs.' variables are all empty the old standard
'bootargs' way will be used.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some devices need to be moved to the PCM970 source file later, because
in fact these devices are not installed on the main unit PCM038.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Power and frequency should be setup before initialize other devices.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The trap relocation function trap_reloc can be used across several PPC
platforms and is added to the ppc library. Accordingly, the definition
of trap_reloc is removed from mach-mpc5xxx/start.S
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Following the MMIO primitives fix, the definitions of __raw_* function
is sourced from Linux and added.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arch/ppc/Kconfig is reworked to make the configuration environment
architecture neutral. All MPC5200 configuration is moved to the
MPC5200 architecture specific configuration file. These modifications
are reflected in the PCM030 board support.
arch/ppc/Makefile compilation directives are updated in preparation
for the introduction of future cpus/machines.
lib/time.c is moved to the architecture specific directory and the
building instructions updated in the Make files. The file is
cleaned up of unused code.
The definition of L1_CACHE_... is updated and CACHELINE_SIZE is
defined in ppc/include/asm/cache.h for future use by the mpc85xx.
The file mach-mpc5xxx/pci_mpc5200.c and mach-mpc5xxx/start.S are
updated accordingly.
The declaration of search_exception_table is moved in
include/asm/common.h because it is used across architectures.
mach-mpc5xxx/traps.c is also updated to reflect this change.
The definition of exception in asm/ppc_asm.tmpl is updated for future
use by the mpc85xx. The file starts.S in mach-mpc5xxx is updated
accordingly.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The following patch serie improve the complete support
by adding a complete framework to aalow commands complete support.
The add also car complete support for eval and setting and executable
file support
This also include an update of the stringlist API to support asprintf
API
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Merge tag 'complete_update_support' of git://git.jcrosoft.org/barebox into next
improve complete support
The following patch serie improve the complete support
by adding a complete framework to allow commands complete support.
The add also car complete support for eval and setting and executable
file support
This also include an update of the stringlist API to support asprintf
API
as the garbage collector will remove the empty function and the
add_ns16550_device is a empty inline if the driver is not enabled.
This will simplify add device adding.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Barebox cannot boot the recent mainline Linux kernels for the
i.MX21ADS board anymore when using TFTP, because the heap is too
small.
Signed-off-by: Jaccon Bastiaansen <jaccon.bastiaansen@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The MD2 add:
- uart 2
- ethernet
- usb
- spi
- i2c
so fix just add uart and ethernet
update defconfig
always enable the motherboard and drop the SHA256 support (to fix in the
256KiB).
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Also definition can be modified in arch/arm/boards/pcm043/lowlevel.c,
but I am not sure is we can call imx_silicon_revision() from
board_init_lowlevel().
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
So we can use it for dhcp request too.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This will allow to understand what happened.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
So we can use it for dhcp request too.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Supported devices:
- nand
- ethernet
- mmc0, mmc1 (on stk5v3 development board)
- led (on stk5v3 development board)
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
barebox can startup with I-cache enabled, so to be on the safe
side we should invalidate the I-cache before jumping to a binary
we just copied in place.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Compile fixes unknown symbol 'mxs_ocotp_read' for tx28 defconfig. Since
the vendor stores the MAC address in OCOTP, we always want this driver.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When a oftree is concatenated,the zImage is bigger than the size specified in
the zImage header. Detect it and copy it too.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Android Image contains 3 components and params
- kernel
- initrd
- second stage (optional)
- tags addr
- bootargs
In fast boot the initrd is mandatory, in barebox we are less restrictive
use the initrd only if present
add to env params:
aimage_noverwrite_bootargs
Disable overwrite of the bootargs with the one present in aimage
aimage_noverwrite_tags
Disable overwrite of the tags addr with the one present in aimage
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without yet adding in the underlying code, extend the revision
checking code to return additional values for PandaBoard ES boards.
Much of the code was taken close to verbatim from U-Boot.
compile tested, and confirmed that this code behaves identically to
the original panda configure and build for the three pandas i have:
* Rev A2 (boots)
* Rev EA3 (boots)
* Rev B1 ES (no output)
so while there's still work to be done, this at least represents the
necessary infrastructure to start *recognizing* panda ES boards.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Tested-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
add oftree partition to store the dtb
set the oftree location
use a zImage by default now
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This means using an uint64_t instead of a struct pad_desc which allows
us to change pad settings using logic operations. Also with this we
can more easily keep the iomux tables in sync with the kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Also renamed config option name to MFD_MC13XXX.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
by default we boot the same way as before
The menu add interactive interface to choice boot, reset or update the system.
We still can access the shell.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pcm027 is a PXA270 based Phytec phyCORE board.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Boot zImage and update nand partition layout to store the oftree.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Gregory HERMANT <gregory.hermant@calao-systems.com>
Boot via nfs instead of tftp and zImage.
Update nand partition layout to store the oftree.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Gregory HERMANT <gregory.hermant@calao-systems.com>
Read-only support for now to get MAC addresses.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this patch fix the following warnings :
arch/arm/mach-at91/at91sam9g45_devices.c:305:3: warning: initialization discards 'const' qualifier from pointer target type [enabled by default]
arch/arm/mach-at91/at91sam9g45_devices.c:309:3: warning: initialization discards 'const' qualifier from pointer target type [enabled by default]
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
e62edd3 mxs: Fix support for BITKEEPER() macro
added this macro in iomux-imxc.c but the macro is not present
in the i.MX23 case. Adding it in iomux-imx23.h fix both
imx23evk_defconfig and chumbyone_defconfig
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Juergen Beisert
Marc Reilly
Antony Pavlov
Sascha Hauer
Wjatscheslaw Stoljarski (Slawa)
Teresa Gámez
Alexander Shiyan
Alexey Galakhov
Juergen Kilb
Jan Weitzel
Christian Kapeller
Maxime Ripard
Jan Luebbe
Wolfram Sang
Marc Kleine-Budde
Jean-Christophe PLAGNIOL-VILLARD
Anand Gadiyar
Eric Bénard
Renaud Barbier
Robert Jarzmik
Uwe Kleine-König
Krzysztof Halasa
Jaccon Bastiaansen
Robert P. J. Day
Uwe Hermann