With 2k NAND flashes the data layout in memory is not what is
written on the flash device. This leads to the result that the
factory provided bad block markers are not recognized correctly.
To preserve the factory bad block information the i.MX NAND driver
will not scan for the bad blocks itself when there is no flash based
bbt available, because the mtd layer would do so based on wrong
information. Instead, a new command is introduced which allows to
manually create a flash bbt based on the correct information.
As this command is tightly coupled to mtd and the i.MX NAND driver
the command is placed under drivers/mtd/nand/ instead of commands/
where a command normally belongs to.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The information which kind of bbt (if any) is used is hidden somewhere
in the NAND layer. Expose it to a device parameter to make it detectable
and visible during runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that we have framework support for delayed probing of
ata devices implement it in the ahci driver to actually make use
of it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ata device usually take a long time to spin up, so it makes sense
to only spend this time when the device is actually used.
This adds a logical ata device and attaches a 'probe' parameter
to it, similar to what MMC does.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The following commit accidently bailed out if the link is up, not
when it's down as stated in the commit message.
| commit a3f74d928c
| Author: Rob Herring <rob.herring@calxeda.com>
| Date: Mon Feb 11 18:02:00 2013 +0100
|
| ahci: handle COMINIT received during spin-up
|
| Some Intel SSDs can send a COMINIT after the initial COMRESET. This causes
| the link to go down and we need to re-initialize the link.
|
| Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
OFDEVICE decides whether or not we compile in support for probing
devices from the devicetree. Let the user decide this explicitly.
This makes the oftree, of_node and of_property commands independent
of devicetree device support since being able to manipulate
devicetrees has nothing to do with probing devices from the devicetree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In order to be able to handle multiple devicetrees, do not assume
the tree to be unflattened is the barebox internal one. Instead,
just return a pointer to it and assign the barebox internal root_node
external to the unflatten function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The allnodes list makes it hard to handle multiple devicetrees. Having
a list to iterate over all nodes of a tree is still good to have though.
This patch uses the list_head of the root node as the head of the list.
This way the root node is no longer part of the list, but when iterating
over a tree the root node is not interesting anyway.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
of_find_node_by_path iterates over the allnodes list. Depending on
where the node we look for is, this can be significantly slower than
using the tree structure to look for a node, so iterate over the tree
instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fixes following warning:
drivers/w1/w1.c: In function 'w1_found':
drivers/w1/w1.c:471: warning: integer constant is too large for 'long' type
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fixes following warning:
drivers/mtd/nand/nand_write.c: In function 'nand_do_write_ops':
drivers/mtd/nand/nand_write.c:272: warning: 'ret' may be used uninitialized in this function
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
While erasing bad blocks is a potentially dangerous operation
it is sometimes needed during development or when some foreign
code has touched the flash.
This patch adds a device parameter 'erasebad' to allow erasing
bad blocks. Since this is not wanted during production this is
behind a Kconfig option.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows us to have some NAND specific stuff during registration,
like for example adding NAND specific device parameters.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since recently we check for the page being written for not being
empty and do not actually write it when it is. This fails for a
freshly created flash bad block table when all blocks are good.
In this case the bbt code will try to write an empty page, but
with the BBT marker in OOB. This page never gets written, so the
BBT code will not find a bad block table during next start up and
writes it again. Fix this by checking if we want to write OOB data,
if we do, then write the page, even if the data is empty.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
do not try to read the status in force mode
the link is up
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Do not write pages which only contain 0xff. UBI expects pages which
seem empty to be writable. This got lost with:
| commit 3139c3e9a6
| Author: Sascha Hauer <s.hauer@pengutronix.de>
| Date: Thu Nov 29 11:16:40 2012 +0100
|
| mtd core: call driver write function with complete buffer
|
| mtd->write is supposed to loop around pages internally, no need
| to do this in mtd_write. This fixes a huge write performance drop
| with the m25p80 driver when it was converted to a mtd driver recently.
| Since mtd->writesize is 1 for this driver mtd_write ended up doing
| single byte writes on the flash.
Introduce mtd_all_ff as a global function since UBI currently has its own
implementation.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
RTS is an output. Either flow control is used and you care about the state or
it is not used and you don't care. So setting it to active does no harm in
either case. This is inline with what Linux does.
Mandatory for Highbank as example
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides rename MFD-related symbols for using MFD-prefix.
Additionally, sorting mfd/Kconfig and mfd/Makefile records.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds USB gadget support to the i.MX chipidea driver. Basically
we have to add a register function to the fsl udc driver and call
this from the chipidea driver if device mode is selected.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
CFI Flash is currently handled outside the mtd layer which makes it
a special case. Integrate it into mtd so that we get rid of this
special status.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of dereferencing struct mtd_info members directly use
the wrapper functions which have an additional check if the
callback exists if it is optional, like mark_bad or is_bad.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Kernel has mtd_read, mtd_write, mtd_erase and mtd_block_markbad.
Add these functions to barebox aswell to make future mtd synchronizations
with the kernel easier.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These are currently named mtd_read/write/erase. Functions with
the same name exist as global functions in the kernel. Rename
them to mtd_op_* to avoid name clashes with future mtd updates.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
HSIC needs some special setup for i.MX6. Most ugly detail is that
the HSIC needs help of the IOMUX to configure a pullup on the strobe
line. This has to be done after the ehci controller has started.
Fortunately there is only one muxing possibility for the HSIC ports
on i.MX6, so we can simply control the iomux from the usbmisc driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some controllers need an init hook after the USB controller is
started, so implement the post init hook for i.MX.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
calxeda use the generic driver but have it's own compatible cf Linux kernel
Documentation
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so when the first stage booloader of firmware provide the dtb
we can use it to probe the memory
also allow to print what we probe
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some Intel SSDs can send a COMINIT after the initial COMRESET. This causes
the link to go down and we need to re-initialize the link.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we can use it on vexpress to detect the hardware mapping
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch moves the register defines and bit definitions
into one include file. As the defines are common for ssp
and mci devices they can be shared.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Due to a hw bug do not enable teh Asym_Pause.
Otherwise if you ser the bit 11 in 4h you will have to unplug
and replug the cable to make the phy work.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
based on the kernel code
detect it via IP version
In the GEM we can use a full packet buffer for receive but the buffer size
need to be 64bit size aligned.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
the mininal tx ring size is 2 as if one we wrap on the same descriptor
and can cause IP lock on GEM (gigabit version) this is always the case
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as eth_device init is planning for remove and we need the init before register
the mdio bus
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Tested-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Previously, during a multi-page write, chip->oob_poi would not be
reinitialized.
See commit f722013ee9fd24623df31dec9a91a6d02c3e2f2f in the kernel
for an analogous change.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as we will add later the GMAC IP verion support (GEM)
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some 1-wire device need to be search twice to be detected
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This IP is present on the at91sam9 until the sam9g45, on the sam9x5 we use a
new IP.
This driver is based on the linux one.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently there is no common way for the mci host driver to tell
that thee car is write protected. This adds a card_write_protected callback
which is used by the framework to tell whether it's protected or not.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as it's handle by detecting the IP version and bus with
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as we need to reset the IP
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
disable interrupt and reset the IP at the probe
set timout at the host init
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
to be consistent and have a unique naming convention
be in sync with the kernel too
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
to be consistent with the kernel
This also reduce the ligne length
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
to be consistent with the kernel
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will allow to have no console support
Use full for bootstrap as we can save 6.5 KiB (barebox.bin) and
3.8 KiB (zbarebox.bin lzo) on at91sam9263 as example vs console simple
As on bootstrap we have often very limited size.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Checking the status field of the qTD token in the current code
do not take into acount cases where endpoint stall (halted) bit
is set together with XactErr status bit. As a result clearing
stall on an endpoint won't be done if this status bit was also
set. Check for halted bit and report USB_ST_STALLED status
if the host controller also indicates endpoit stall condition.
From u-boot by Anatolij Gustschin <agust@denx.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
the current mmu support is broken
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows to register the USB ports for the chipidea driver. For
now the otg/h1 register functions also register the corresponding
USB phys.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This phy is found on i.MX6 and i.MX23/28. Currently tested only on i.MX6.
For now we take the easy way out. The phy is enabled upon registration.
More elaborated handling can be added later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Jean-Christophe PLAGNIOL-VILLARD
Alexander Shiyan
Marc Kleine-Budde
Hubert Feurstein
Rob Herring
Michael Grzeschik
Alexander Aring
Jan Luebbe