Access pin and drivegroups through a drvdata pointer.
This allows to insert other groups for SoCs with a
similar bit layout easily.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If the bootloader doesn't init the architectural timer
on Cortex A15 Linux falls over when trying to boot.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
I don't know why get_runtime_offset fails on T124 yet,
but this is a safe workaround, with the nice side-effect
of fixing second stage barebox loading.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Don't disable clk to unrelated devices in the process.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Those 3 are needed to power CPU0 from the CPUG cluster.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Even the lowlevel functions are growing to a
size where having a stack seem beneficial.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In RCM aka recovery mode the BootROM waits for a
usbloader to take over control. On most boards this
is triggered by holding a physical switch which may
be inconvinient at times. Add a command to switch
into RCM from software.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It wasn't hard to find the right spot to copy the image
to before, but this makes it a bit more explicit.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The voltage for programming the fuses is external to the SoC and
on some boards this is controllable with a regulator, so add regulator
support to the iim driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Allow to read/write the registered MAC addresses in the iim
module directly via a device parameter.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX5 iim has an additional bit in the CCM module which
enables the supply. Add support for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
imx_iim_read is a iim internal function, so access the
internal functions rather than using the cdev API.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With devicetree devicenames start with numbers. Parameters on these
devices are not accessible since variables can't start with numbers.
Register a logical 'iim' device which makes the permanent_write_enable
and explicit_sense_enable parameters accessible again.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of duplicating data shared between the banks in a bank
specific struct, use a iim struct and a bank struct.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There is no need to check the card-detect status
for non-removable devices.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Bit 7 of UCR3 is described in the i.MX reference manuals (with the exception
of i.MX1) as follows:
ADNIMP: Autobaud Detection Not Improved-. Disables new features of
autobaud detection (See Baud Rate Automatic Detection
Protocol, for more details).
0 Autobaud detection new features selected
1 Keep old autobaud detection mechanism
The "new features" mechanism occasionally causes the receiver to get out of sync
and continuously produces received characters of '0xff'.
In order to reproduce the problem:
$ cs0.baudrate=19200
- Change the terminal baudrate to 19200
- Type in the console and it should look good
- Change the terminal baudrate back to 115200
- Type 'b' in the console, then a stream of '0xff' is transmitted in loop
Setting the ADNIMP bit avoids the transmission of '0xff' in loop.
Also rename the bit definition as per the reference manual.
Tested on mx6q.
Based on a patch from Eric Nelson for U-boot.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>