This is needed for i2c-gpio support
Based on linux 3.7-rc2
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we can show the this of i2c busses
set the bus device as parent of all devices.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as in linux
SD/MMC support only mode 0 or 3 (if 0 not supported by the spi master)
so if the mode is not 3 force 0
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we can detect sd card version 2.0 on spi
as we need to the OCR_HCS on version 2.0 regardless if it's a SPI or not
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The spec says: "the CMD8 CRC verification is always enabled.
The Host shall set correct CRC in the argument ofCMD8. If
CRC error is detected, card returns CRC error in R1 response
regardless of command index."
Make it simple, and compute crc on every commands.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this need to be handle at framework and driver level
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This makes the code mre readable
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we can request a master usefull for the spi command
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On LAN9115/LAN9117/LAN9215/LAN9217, external PHYs are supported.
Switch to external PHY based on hardware strap pin and/or override flags.
Also add a mask to platform data selecting external PHY address to be used.
Code based on linux/drivers/net/ethernet/smsc/smsc911x.c (fd9abb3d, d23f028a).
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
commit 89dfe2d2af "mdiobus: do not scan
the bus at registration time" dropped the check for struct mii_bus
element phy_mask while scanning through all addresses.
Re-add this check.
Signed-off-by: Andreas Pretzsch <apr@cn-eng.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Scanning the bus can take some time. If we do not need the ethernet
device, this is unnecessary, so delay the scan until the phy device
iactually is needed.
Andread Pretzsch: Fixup bug in scanning for all devices.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Andreas Pretzsch <apr@cn-eng.de>
this allow to do not provide block_isbad at mtd driver level
as example spi flash
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use irq pin as the pin is asserted untill we clear it
This will allow to do not poll on i2c which slow down barebox
If no irq_pin is provided fall back on i2c polling
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a simple serial driver for CLPS711X architecture.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
on some system as the spi_transfer is not set to 0 if the rx_buf or tx_buf
are not used they are not set to NULL
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
fec_init() initializes some bits important for phy access, so do
this before the mdiobus is registered. This fixes mdiobus support
on i.MX28 boards in RMII mode.
Reported-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Test if we already found a phy device on an address earlier and return
it if it exists. This makes it possible to call mdiobus_scan multiple
times.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Several i.MX boards (all i.MX6 boards) need to do some adjustments
to phy registers. If barebox itself does not use network, networking
won't work in the kernel if the kernel does not have the fixups. Connect
the phy at probe time so that these tweaks are done during probe so that
the kernel works without phy register tweaks. Also this has the effect
that the phy device is present and introspectable without doing fake
network transfers beforehand.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The console layer calls of_device_is_stdout_path for a new console. When
we are booting without devicetree then of_chosen is NULL which makes barebox
crash. Check for a NULL pointer in of_find_property to prevent this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will allow to avoid issue with resource order
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Based on linux implementation.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Based on linux implementation.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Based on linux implementation.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
export for each device via param
the familly id (fid)
the id
the full reg_num
so for simple 64bit memory rom(ds2401/ds2411/ds1990*) no need driver.
Based on linux implementation, cleaned and re-implement the master/slave
support to use the device/driver model correctly.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When using the serial console over USB to download files, and
when the USB bandwidth is pushed to its limits, the barebox UDC
device won't be able to absorb all the traffic.
Modify the u_serial gadget so that if there is not enough room
in buffers, don't push USB requests down the gadget driver, so
that it is saturated, and give it a chance to NAK requests.
The previous behaviour was loosing bytes (as kfifo_put is lossy).
The fixed behavious is lossless (based on USB NAK protocol).
While at it, increase a bit buffer sizes to 8kB to absorb heavy
transfers such as a linux kernel image.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
common.h should come first, other include files implicitely depend
on it. Also, remove unused fs.h and remove commented line.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Got this when compiling sandbox on a 64-bit system:
drivers/mtd/ubi/cdev.c: In function ‘ubi_volume_cdev_read’:
drivers/mtd/ubi/cdev.c:26:2: warning: format ‘%d’ expects argument of type ‘int’, but argument 3 has type ‘size_t’ [-Wformat]
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch is from linux 3.7-rc1 and adapt to Barebox
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In order to avoid misalignment, just remove the right alignment while
printing the drivers list.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as we do not need to probe them and they have no driver or bus attached
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will allow to knonw the pid probed
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If none set use NA (0) as before.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The check is wrong since it would have to check whether the
new iomem region overlaps with an existing region. Checking
for the base address only is not enough.
Currently this is not possible because every device conflicts
with the top iomem region which covers the whole address space.
This at least fixes the regression that devices whose memory region
begins at 0x0 can no longer be succesfully registered.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Alexander Shiyan <shc_work@mail.ru>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
On i.MX we enable all necessary clocks during startup of the clock
controller driver, so we do not need the register hacking in the drivers
anymore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This controller has no enable bit. It is always on once the
pixel clock is provided. This patch switches the driver to use
regular clk functions instead of SoC specific register hacking.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- for i.MX1 the register is in the System Control unit, so move
the code to arch/arm/mach-imx/imx1.c
- for the other i.MX the register is in the watchdog unit, so move
the code to drivers/watchdog/imxwd.c
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The _send function should not return the length
of the transmitted packet.
See also
commit 76c4c9e48f
Author: Jan Luebbe <jlu@pengutronix.de>
Date: Fri Sep 28 18:17:44 2012 +0200
davinci_emac: return 0 on successful transmit
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds the device id mechanism to the i.MX fec driver and
uses it to determine the fec version. Also adds devicetree
probing support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
/opt/work/barebox/drivers/net/designware.c: In function 'dwc_update_linkspeed':
/opt/work/barebox/drivers/net/designware.c:234:9: error: 'mac_p' undeclared (first use in this function)
/opt/work/barebox/drivers/net/designware.c:234:9: note: each undeclared identifier is reported only once for each function it appears in
/opt/work/barebox/drivers/net/designware.c: In function 'dwc_ether_open':
/opt/work/barebox/drivers/net/designware.c:254:6: error: too few arguments to function 'phy_device_connect'
/opt/work/barebox/include/linux/phy.h:252:5: note: declared here
/opt/work/barebox/drivers/net/designware.c: At top level:
/opt/work/barebox/drivers/net/designware.c:226:13: warning: 'dwc_update_linkspeed' defined but not used
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
So we can check it with the kernel one
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The old clock support is now unused. Remove it. The former i.MX clko
command is superseeded by generic clock manipulation commands.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds barebox common clk support loosely based on the Kernel common
clk support. differences are:
- barebox does not need prepare/unprepare
- no parent rate propagation for set_rate
- struct clk is not really encapsulated from the drivers
Along with the clk support we have support for some basic clk building
blocks:
- clk-fixed
- clk-fixed-factor
- clk-mux
- clk-divider
clk-fixed and clk-fixed-factor are completely generic, clk-mux and clk-divider
are currently the way i.MX muxes/dividers are implemented.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Most clock/device associations can be done based on the physical
base address of the corresponding device. So instead of depending
on string matching add an optional possibility to associate a clock
lookups with physical addresses. This also has the advantage that
the lookups for devicetree based devices can be identical to the
platform based devices.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
on Cortex A9 and Cortex A5 we have a generic timer which we can use as
clocksource
Limit the timer frequency to < 25Mhz
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Also pass flags using platform_data and remove useless casts from void*.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The _send function should not return the length of the transmitted packet.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The timeout for wating for the bus to be idle is too short when the
card does internal garbage collection. This was triggered with filling
an SD card under Linux with /dev/urandom, then doing a saveenv under
barebox afterwards.
Linux has timeouts here up to 300ms. Use a second to be safe.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit 5888a3b5c9 accidentally changed
this to printf.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This will allow speed up the dev on framebuffer.
By default the resolution is VGA but this can be changed via cmdline.
We use a pthread to Flip the screen every 100ms as we can not detect when
barebox update it as barebox simpliy write in a buffer.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adapt phylib from linux
switch all the driver to it
reimplement mii bus
This will allow to have
- phy drivers
- to only connect the phy at then opening of the device
- if the phy is not ready or not up fail on open
Same behaviour as in linux and will allow to share code and simplify porting.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This is need for oftree device probing
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This will allow reduce the number of driver and device to search on.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
toread is unitialized. We have to use count instead.
| commit 992c291e95
| Author: Sascha Hauer <s.hauer@pengutronix.de>
| Date: Sat Sep 15 16:54:47 2012 +0200
|
| mtd mtdraw: Fix partial page read
|
| When reading parts of a page we have to limit the maximum bytes copied
| to the remaining bytes of a page.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will ensure the data are set to 0 (list as example)
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When reading parts of a page we have to limit the maximum bytes copied
to the remaining bytes of a page.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Some of the newer MLC devices have a 6-byte ID sequence in which
several field definitions differ from older chips in a manner that is
not backward compatible.
This method is already used in the Linux Kernel.
Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This has been tested by using UBI with a N25Q128 connected to
a TI McSPI controller.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds code to probe devices from a devicetree. Most helper
functions are directly imported from Linux.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Drivers need to get their driver data either from devicetree or the platform
information. It should matter for the driver where this data comes from, so
introduce a common function for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It starts the switch and provides basic access to the registers.
This driver could also work with some other Micrel switches, possibly
with some small changes.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It is common for drivers to handle multiple similar devices. On
Linux the driver can distinguish between the devices using the
platform_device_id mechanism. Introduce the same for barebox.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Printing device context normally should be "driver instance:",
but instead we printed the device name twice. This patch fixes
this and as a bonus makes the binary a bit smaller. Instead of
a '@' between driver and instance this function now prints a
whitespace which is a bit more like Linux.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a I2C bus on which the I2C devices and drivers register.
This makes it cleaner as I2C devices won't accidently end up probed by
a platform_device driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a SPI bus on which the SPI devices and drivers register.
This makes it cleaner as SPI devices won't accidently end up probed by
a platform_device driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Upcoming patches will put I2C/SPI on their own busses with
spi_register_driver / i2c_register_driver which will only
be available if the subsystem is enabled. We could provide
static inlines, but it wouldn't make much sense to compile
a spi/i2c driver if the corresponding subsystem is disabled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
since 99e72c8bbd on an i.MX51 based board,
I get : "phy0: Link is up - 1000/Full". It seems miidev tries to probe
the PHY to early and gets 0x3ffff which leads to the wrong capabilities
setting.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use be(xx)_to_cpu function to switch endianness intelligently.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allow to detect the amba device and use the right driver for it at
runtime.
With pl011 amba support (ARM & ST Variant)
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Merge tag 'amba_bus' of git://git.jcrosoft.org/barebox into for-next/amba
arm: Introduce ARM AMBA bus
This allow to detect the amba device and use the right driver for it at
runtime.
With pl011 amba support (ARM & ST Variant)
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Upcoming patches will put I2C/SPI on their own busses with
spi_register_driver / i2c_register_driver which will only
be available if the subsystem is enabled. We could provide
static inlines, but it wouldn't make much sense to compile
a spi/i2c driver if the corresponding subsystem is disabled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This will allow to detect the amba device and use the right driver for it at
runtime.
The code is base on linux 3.5.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
If pdata is NULL smc911x_probe will crash. Checking the zero initialized
priv->shift results in default configuration if pdata is not set.
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
the check need to be inverted
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For the size_t type the format specifier %zu or %zx must be used.
See Documentation/printk-formats.txt in the kernel for details.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The stmpe mfds can be connected via i2c and spi. This driver provides the basic
infrastructure for the i2c kind. It can be added as a normal i2c-device in the
board code. To enable functions a platform_data struct has to be provided, that
describes what parts of the chip are to be used.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
A function to calculate the frequency divider and digital filter sampling rate
for the 85xx processors is added to the i2c-imx driver. Hence, this driver is
usable on IMX and 85xx machines.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The IMX i2c driver is to be used by SOCs on both the ARM and PPC architetures.
Use a more neutral name for the structure, function names and #define.
The driver name is now "i2c-fsl".
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
A string allocated by asprintf is not freed, so change it to a sprintf
with the preallocated buffer.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Board support units must use only the provided functions.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The mtdoob and mtdraw device don't clean up correctly.
Added a private data element to hold allocated memory.
Fix remove of mtdoob and mtdraw device.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
poll the READY bit in PMT_CTRL. Any other access to the device is
forbidden while this bit isn't set. Try for 100ms
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use linux kernel chip detection from 3.5
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
detect if the bus is swapped and report a 32bit drivers is used on a 16bit bus
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
switch ipe337: to it at the same time to do not brake it
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This will allow to replace them depending on the platform data.
So we can specify shift and reg io witdh (16bit/32bit)
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this make the driver more readable
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
miidev_wait_aneg() polled the wrong bit, so link detection did fail on
boards where the PHY had to come out of a powerdown mode.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In usb_hub_configure the hub is asked for its descriptor and among other things
its bPwrOn2PwrGood time. In the actual hub_power_on function this information
was not used and a hardcoded value was used instead. For some hubs this delay
is to short. So, use the delay the hub wants.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
else when we do "erase /dev/m25p0.rootfs; reset", the board
will never reboot as the flash is busy to finish the erase
command.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
tested with a m25p128 flash both in nand boot & spi boot.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With pbl support enabled most boards need a pbl-y for their lowlevel
stuff.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The existing nand_boot functions all do the same, so move it to
a common place. To be flexible enough for future boards the real
image size is used instead of hardcoded 256k.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Juergen Beisert <jbe@pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This update adds the GIANFAR driver along with the configuration
and build files.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This introduces a new NAND_BUSWIDTH_AUTO flag which can be used
to automatically detect the nand buswidth. The id is always read
in 8bit mode. An additional callback is needed to switch the nand
controller into 16bit mode.
This currently depends on a safe read_byte (always) and read_buf
(for onfi-only flashes) callback. It has been tested on OMAP, but
is not something that generally works. For this reason the existence
of the set_buswidth callback is used to determine whether we are
able to do autodetection or not.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use the prefetch engine to improve NAND performance. The howto
is derived from the Kernel. Unlike the kernel we do not make
the access mode configurable.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- dev_ready is supposed to return whether the device is ready or
not, not to poll until the device is ready.
- dev_ready should return true for ready and false for not ready
- waitpin polarity is not needed (at least the kernel does not have it)
- wait_mon_mask must be 32bit.
The code was unused since no board specified a wait pin, so no breakage
included. This also removes the now unused timeout variable from
platformdata.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX5 does not have a valid function to get the spi clock. This
patch introduces a function for i.MX6, and moves the bogus spi clock
speed to the speed-imx5*.c. Not nice, but preserves the current status
quo for i.MX5
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The driver currently erases blocks in 4kb chunks if 4kb support is
available. This patch uses bigger blocks for suitable areas to speed
up erasing areas.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The erase command normally makes sure that the selected area is erased,
therefore align the parameters to eraseblock boundaries.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use %u instead of %d for an u32 variable
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of taking the value from somewhere, use the selected architecture to
select one. This ensures the selected clock source corresponds to the values
setup in the clocks-*.c from the mach directory.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This should work on S3C24XX and S3C64XX SoCs.
Tested at runtime on a Mini2440 and Mini6410.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
More or less just cosmetic (removing ifdefs!).
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The '__maybe_unused' attribute prevents the compiler from warning about an
unused variable and the 'static' will remove it entirely if it's not used.
This patch is only cosmetic.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This bit magic is just setting and reading the UART's selected clock source.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
More or less just cosmetic. Easier to read, and lets the compiler remove unused
code.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Although the driver could work on this hardware, i.MX1 support
currently lacks the necessary clocks resulting in linker errors.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some drivers use gpio_request/gpio_free. Currently no architecture
has code behind these functions. Provide static inline functions
for these and remvoe the at91 specific inline functions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The LED core itself does not need gpio support, so remove include
so that it compiles on architectures without gpio support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provide setup for SPI clk frequency global to driver.
For MC13783 maximum clock frequency is 20 MHz,
for MC13892 maximum clock frequency is 26 MHz,
so we define 20 MHz as a maximum SPI clk.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The name "serial_ns16550" is not handy because the devices
will have the names like "serial_ns165500", "serial_ns165501",
"serial_ns165502" etc.
The names like "ns16550_serial0" and "ns16550_serial1" look
much better.
Also it is reasonable to make serial driver's names unification.
E.g. see the names for drivers in drivers/serial directory:
"netx_serial",
"mpc5xxx_serial",
"altera_serial",
"s3c_serial",
"imx_serial",
"pxa_serial",
"blackfin_serial",
"stm_serial",
"pl010_serial",
and even "g_serial" in ./drivers/usb/gadget/serial.c
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The 'off_t cur_ofs' variable was missed during the 64 bit conversion.
For the MEMGETBADBLOCK ioctl, a pointer to a loff_t is needed.
Also adjust the debug format strings.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since this commit we interpret the argument to the bad block ioctls
as a pointer to a 64bit number:
|commit e71c343668
|Author: Sascha Hauer <s.hauer@pengutronix.de>
|Date: Fri Oct 14 11:57:55 2011 +0200
|
| mtd: fix arguments to bad block ioctls
|
| In the Kernel the mtd ioctls expect a pointer to the offset, whereas
| barebox interprets the pointer itself as an offset. Since we want
| to add 64bit support for file sizes a pointer may not be sufficient,
| so align with the kernel and convert it to a pointer to the offset.
|
| Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This missed some places, fix them aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- add CMD_PARAM and read_param to get the ONFI structure
- fix OOB size for flash with 224 OOB on i.MX51/3
- add the same ecc layout as the one in the kernel for
4k page flashs
Tested on an i.MX53.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
the code is taken from linux & u-boot implementations
Validated on an i.MX53 which gives the following log :
ONFI flash detected ... ONFI param page 0 valid
NAND device: Manufacturer ID: 0x2c, Chip ID: 0x38 (Micron MT29F8G08ABABAWP), page size: 4096, OOB size: 224
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We now have a resource size for the ehci hccr register space. This
was assumed to be 0x40 in size. On OMAP though it is only 0x10 and
then the hccr resource conflicts with the hcor resource which results
in a non working ehci port on beagle and panda boards. This patch
adds a nonintrusive workaround, it limits the hccr resource to 0x10,
which then also works on OMAP.
Later we should drop the multiple resources for the ehci port and
make the resource as specified in the datasheets.
This is broken since:
commit 08845e41fb
Author: Sascha Hauer <s.hauer@pengutronix.de>
Date: Wed May 23 12:54:24 2012 +0200
usb ehci: Add resource sizes
add_usb_ehci_device registers resources with size 0. Fix this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Storing the size instead of the resource end in struct resource was
a mistake. 'size' ranges from 0 to UINT[32|64]_MAX + 1 which obviously
leads to problems. 'end' on the other hand will never exceed
UINT[32|64]_MAX. Also this way we can express a iomem region covering
the whole address space.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In the Kernel the mtd ioctls expect a pointer to the offset, whereas
barebox interprets the pointer itself as an offset. Since we want
to add 64bit support for file sizes a pointer may not be sufficient,
so align with the kernel and convert it to a pointer to the offset.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The dump generated by "md -w -s /dev/phy0"
suggests individual registers need to be
addressed by byte offset, not by register number.
E.g. to set the autonegotiation advertisement register
for 10Mbit only, use "mw -w -d /dev/phy0 8+2 0x0061".
The current mix of offset == register number, but
count == byte count is unintuitive.
Also, to be consistent with "md" on /dev/mem, round up
the count so "8+1" also works to access one register.
However, no attempt is made to do read-modify-write
single byte writes.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Check if the PHY is really accessible (e.g. the
PHY address is correct) during probe.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The auto negotiation result is the intersect
of the advertised abilities and the link partner abilities.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Based on the U-Boot version. Changed to kernel style register layout, added
MX23 support (WIP!), made MMU aware and adapted to barebox.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Based on the U-Boot version. Changed to kernel style register layout, added
MX23 support, made MMU aware and adapted to barebox.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We do not need to invalidate the cache in the poll loop anymore
since the corresponding bit is now in a dma coherent area. Instead,
flush cache before hardware operation and invalidate afterwards. Put
the corresponding code inline since it's shorter.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There's no point in syncing them manually. Instead, use
dma_alloc_coherent and skip the manual flushing/invalidating.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is another variant of:
USB gadget fsl: request cacheline aligned buffer
The fsl udc driver allocates a buffer for small requests. The
driver then calls dma_inv_range later on it. This buffer happens
to be not cacheline aligned which means that a dma_inv_range can
corrupt other memory around the buffer.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[mkl: use dma_alloc]
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The fsl udc driver allocates a buffer for small requests. The
driver then calls dma_inv_range later on it. This buffer happens
to be not cacheline aligned which means that a dma_inv_range can
corrupt other memory around the buffer.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[mkl: use dma_alloc]
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a simple wd command which can setup, trigger and stop a watchdog
on the platform.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Linux Kernel defines only one of __LITTLE_ENDIAN and
__BIG_ENDIAN. Endianess can then be tested with #ifdef __xx_ENDIAN. Userspace
always defined both __LITTLE_ENDIAN and __BIG_ENDIAN and byteorder can then
be tested with #if __BYTE_ORDER == __xx_ENDIAN.
As we tend to use a lot of Kernel code in barebox we switch to use the kernel
way of determing the byte order.
As this always causes a lot of confusion add a check to include/common.h to
make sure only one of __LITTLE_ENDIAN and __BIG_ENDIAN is defined.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Straight forward port of Synopsys Designware ethernet
driver from u-boot v2012.04.01.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
resource_size_t can be 32bit or 64bit depending on the architecture.
Add a define for it to be able to printf a resource_size_t correctly
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Show progressbar even when erasing just a single sector,
otherwise it looks as if erase didn't do anything.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
"erase /dev/myflash0 0+1" erased the whole flash,
similar for other value of count if you guessed the
erae block size wrong.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We have to set the name in struct usb_driver, not the one
in struct driver_d which gets overwritten with usb_driver->name
during registration.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To avoid unnecessary preset initial state chipselect lines for SPI, set it to
inactive state when adding devices to the system.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The mc13xxx driver correctly bails out on failure, but leaves
mc_dev initialized, so a later mc13xxx_get won't fail but returns
an invalid pointer. Fix this. While at it, remove some superfluous
code from mc13xxx_get.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This causes allocation of a free id and avoids conflicts if multiple
identical SPI devices are attached.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Ok, I assume this should go into separate series. It fits both S5PV210 and S3C6410.
This adds support for S3C and S5P architectures (all of my knowledge) to the
serial driver. Since the only difference between them is in clock handling,
this is moved to an arch-dependent separate function.
Most modern architectures should define S3C_UART_HAS_UBRDIVSLOT and S3C_UART_HAS_UINTM.
This adds support for most
Signed-off-by: Alexey Galakhov <agalakhov@gmail.com>
Signed-off-by: Juergen Beisewrt <kernel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If DEBUG is defined it fails due to wrong variable names
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The netX internal UART latches register settings and internally uses
them only if written in the correct order. Other orders may work, but
sometimes the UART gets stuck, as the baudrate has not correctly been
set.
Signed-off-by: Michael Trensch <MTrensch@gmail.com>
Acked-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of directly accessing the struct member of struct param_d
use the provided getter function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some phys need board specific fixups. To be able to do this
from board code add mii_open/mii_close functions so that the
board can use the regular mii_read/mii_write functions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently only 100Mb/s is tested. Freescale's U-Boot suggests that
there are some additional adjustments necessary for Gigabit support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Backport 2 fixes back from Linux kernel (title verbatim from
Linux kernel log) :
- docg3 fix in-middle of blocks reads
- docg3 reduce read alignment burden
These 2 enable partial reads from the MTD (ie. read only the
111 first bytes), which enable linux kernel booting or UBIFS
from barebox.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As per MMC spec, once power has been applied to an SD card, the card
can take as much as 250ms to complete its power-up cycle, and become
responsive to CMD0.
When this delay was not in place, activating the SD card in the env
init failed sometimes. With it, no more failure are observed.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pxamci driver was not waiting for the BUSY line to be
deasserted. This was specifically breaking the CMD12 at
the end of block multiple writes, when the SD card had not
time enough to commit the last write.
Fix it by waiting for PRG_DONE bit (which is actually the
busy signal end condition).
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pxamci requires a bit to be set in the command control
register when a CMD12 is sent. Set it, as required in the
PXA Developer Manuel, chapter "Stop Data Transmission
Command (CMD12 or IO/Abort with CMD52)".
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When preparing a command, apply a mask so that only the command part
will be used for the switch case. This will be more robust
for future command response types.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix clock handling accordingly to PXA manual :
- enable the MMC controller clock once and for all
- only disable the MMC bus clock when changing the MMCLK by
adjusting the clock ratio, else let the controller and SD
card shut down the clock as the see fit.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of using hard encoded values in the code, use defines to setup
the timeouts of reads/writes/commands.
Fix the read timeout as defined in the PXA Developer Manual.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently all devices have an id meaning that all devicenames
end with a number. This patch adds a DEVICE_ID_SINGLE to make
it ppossible to register a device without an id assigned to
it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is based on the following U-Boot commit:
commit 5f4b4f2fed3ab8590c8c06b78642f8c1467acacf
Author: Vincent Palatin <vpalatin@chromium.org>
Date: Mon Dec 5 14:52:22 2011 -0800
ehci: speed up initialization
According to EHCI specification v1.0, the controller should stabilize
the power on a port at most 20 ms after the port power bit transition.
So, we put this setting in the virtual descriptor corresponding field,
(bPwrOn2PwrGood = 10 => 10 x 2ms = 20ms), this saves about 500ms at each
controller initialization/enumeration.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
for chache handling the ehci driver iterates over the hardware lists
of QHs/TDs. As we have a fixed number of maximum entries in this lists
we can allocate them as arrays and and clean/invalidate the arrays
instead which is much simpler. While at it, move the allocation to
ehci_probe so that we do not lose memory each time ehci_init is called.
Also, use memalign to allocate the QHs/TDs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Also renamed config option name to MFD_MC13XXX.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The intel cfi buffer write has a problem with writing when
the alignment of the buffer in memory is smaller than the
flash bus width.
This patch fixes a alignment problem which may show during this
scenario:
- 32 or 64 attached NOR flash
- flashing an image directly from network to the nor flash
The involved network driver is "smc9111.c".
The data that comes from the network stack and should be written into
the flash isn't 32 bit aligned (at least with this network driver).
This is probably due to the 48 bit wide ethernet addresses.
However the "cfi_flash.c" driver doesn't handle this situation, and
accesses the not-aligned address with a 32 bit pointer.
This patch fixes the problem by reducing the access width if an
aligment problem between source and destination is found.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
'reduce the number of loops by the width of the port' means
a simple len / width. Do not try to be clever by shifting
and doing it wrong.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fixes:
drivers/usb/gadget/pxa27x_udc.c:1263:13: warning: 'pxa27x_change_interface' defined but not used [-Wunused-function]
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ISP150x product line have same identifier, we can print these
chips as ISP150x.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since we do not have ISP1504-related functions, we migrated to ULPI.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Added ULPI detection function.
Same function from isp1504 driver removed.
Used implementation from Linux kernel.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These registers can be used for any standart ULPI chip,
not only for ISP1504.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Wait until the reset bit is actually cleared instead of some
arbitrary delay (which caused problems with a PHY which was in some
energy saving mode).
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
First check the status at least once, then do timeout checks. Minor
cleanups also.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We are already setup voltages from capabilities register.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for KS8851 16bit MLL chip from Micrel Inc.
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When programming or erasing a page, don't wait
systematically for 3s, but finish the operation as soon as
the hardware has finished, and timeout if 3 seconds have
passed.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Patch 2c54046510 introduces a private structure
for the S3C based UARTs but still reserves the memory for the smaller
structure which fails at runtime.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This will ensure that we send an other packet only when the first one is send.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If a read or write operation encounters an error, the card
might stay in "recv" or "data" state, and never get back to
"tran" state.
In these cases, the host is required to send a CMD12 (end
transmission) to switch the FSM of the card back to "tran"
state, as described in MMC Specification, chapter "Data
Transfer Mode".
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Do not use dev->priv as a register base, but use a driver private
struct instead. Also, remove usage of dev->type_data
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We currently do not allow to unregister a device when it
has children. However, the return value is seldomly checked.
Also this breaks for hot pluggable devices like USB which we have
to unregister when they disappear. The best way to fix this is to
unregister our children and also the partitions on the unregistered
device.
We unregister the device first and then afterwards the children.
We do this because for example network devices have a miidev as
child which they unregister themselves. So we only have to
unregister the children which are not cleaned up by the drivers,
namely fs devices.
Also, unregister all partitions on a disappearing device.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As pxafb can rely on a PWM to control backlight, and because
driver dependencies are hard to deal with, remove automatic
enable of PXAFB on probe.
The user should in its environment do a :
- fb0.enable=1
This way, the PWM has been probed and is ready to work, and
the pxafb backlight control works.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add PXA embedded pulse width modulator support. The PWM can
generate signals from 49.6kHz to 1.625MHz.
The driver is for pxa2xx family. The pxa3xx was not handled yet.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add variables to control the duty_ns and period_ns of PWM
chips. When these variables are set, a call to either
pwm_enable() or pwm_config() is performed to enforce the
setup values.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds framework support for PWM (pulse width modulation)
devices.
A new pwm can be registered from a hardware driver using
pwmchip_add(). It can then be requested from a client driver using
pwm_request(). A string is used as a unique identifier for the
pwms. It should usually be initialized by the hardware drivers
using dev_name(dev). The client API is the same as currently
in the Linux Kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
First call mii_unregister which is done in the drivers unbind function,
then eth_unregister. Also, remove unregister_device which is done in
eth_unregister.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Whether the controller works in 8bit mode is not only dependent
on the controller but also on the board having wired up 8 data
lines, so put a capabilities field in platform data.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently we test the cards capabilities for being 8bit capable.
This does not work since noone ever sets this bit. Unfortunately
there is no bit to test 8bit capability, so we introduce a patch
from the kernel which puts the mmc card into 8bit mode and tests
whether it can succesfully read the ext_csd in this mode.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Too often I have waited to get a reaction from this driver
when something goes wrong. Use timeout loops instead of
inifinite polling loops.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is quite useful when multiple SD cards are present so spare
some bytes to print this information.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There will always be the next integer number unless we register
INT_MAX disk devices which is rarely the case.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The mci layer uses pr_debug throughout. Use dev_dbg instead
which is very useful when multiple cards are involved.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The mci layer currently passes around a struct device_d for
its internal use. Apart from being confusing this drops
typesafety for no good reason. Instead, pass around a struct
mci.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The s3c driver passes around a struct device_d * internally in which
it is never interested in. Instead pass around a struct s3c_mci_host
and get rid of all this ugly void * derefs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Yes, it does make sense. First there will always be the next
hardware which has multiple controllers. Also, we shouldn't
give bad examples to others.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As we'll need more arguments to set_ios over time put them
in a struct mci_ios like the kernel does.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Whether a card is high capacity is checked in
sd_send_op_cond/mmc_send_op_cond. Remove the wrong check in
mmc_change_freq which wrongly recognizes some eMMC flash
as high capacity.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When unaligned writes are used, typically doing a cp file /dev/mtdraw0.foo,
the alignement correction code was incorrectly handling such cases, and
didn't return the expected number of written bytes.
This was tested on a 528 block size.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently, we can only print the phy_status. Factor out the routine to
get the status, so we can query it from fec drivers and configure
accordingly. Needed because mx28 needs a special bit set for 10Mbit.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Q: "the linux driver add these bits, why not we?"
A: Because nobody activated the bits?
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Introduce a variable which gets updated when needed and only written
once. Will make further additions easier.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
remove double include, remove unused (and double in case of RCNTRL)
defines, sort the includes at least somewhat.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The timings of the poller calling have changed, digging out
a latent bug in pxa27x udc controller.
The polling routine is called before the probe function is
called, and the driver internal are not initialized at that
time. This triggers a NULL pointer exception.
Fix it by moving poller registration after driver probe.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adding overlay support for i.MX3 sdc.
Foreground channel only works when background is also enabled.
The foreground video mode is always the same as the background.
Also added alpha command to set the alpha value of the foreground.
Tested on a phyCORE-i.MX35.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The offset for the IPU Clock in the CGR1 register is 18 not 22.
See MCIMX35RM table 14-17.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Make support of multiple video modes possible for i.MX3 boards.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>