The lowlevel init function was a 1:1 copy from the babbage
baord, so it should be safe to switch to the generic C
lowlevel init.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Eric Benard <eric@eukrea.com>
Reimplement the code from lowlevel.S in C. It is run
from SDRAM anyway, so we can safely do this initialization
in a regular barebox environment instead in Assembly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- move code which can be shared between i.MX53 and i.MX51
to a common file
- rename mx53_init_lowlevel to imx53_init_lowlevel
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add all available video modes to the framebuffer. devinfo fb0
shows the available modes. We can select a mode now.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
without this, the pins seems to be opendrain and thus the LCD signals
are not properly driven leading to wrong colors on the screen.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
nand.c issues a warning when imx_nand_set_layout is
empty. We don't need this function on i.MX53, so
silence the warning.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We switched to resources recently and the nand controller
of the i.MX53 needs two of them, so fix the helper in the
same way as the i.MX51
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds lowlevel (AIPS, PLL, L2) initialization for i.MX53 boards.
This is a direct transcription of Freescales U-Boot assembler code
with the exception that we initialize PLL1 with 1000MHz and assume
that all necessary voltages are already adjusted when we arrive here.
It must be explicitely called from the boards so a board is free to
do it's own initialization. However, boards should use this code
and make it more configurable if necessary.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This brings consistency to the way variables are named and used
according to the Freescale documentation. Also, since user is
supplying row indicies, and not offsets, it's reasonable to amend the
error message accordingly.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds additional Kconfig help to clarify the way to use barebox
for eFuses handling.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To allow for some generic io accessors introduce io.h and use
this instead of asm/io.h throughout the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The nand controller on i.MX51/53 uses two base addresses. Instead
of hardcode the second address use the new shiny resources two specify
it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Based on the Linux driver. Tested with m25p80 with CS in GPIO mode.
Clock setting support is ad-hoc as the corresponding mach is not using
the generic clock infrastructure.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
According to the datasheet, PUE is not effective without PKE set.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that env_push_context is in a coredevice_initcall
we can initialize barebox_loc earlier so that we can
use it inside later initcalls.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer <s.hauer@pengutronix.de> wrote ..
> On Thu, Aug 11, 2011 at 02:37:05PM +0400, Alexander Shiyan wrote:
> > Hello.
> >
> > Please review and apply this simple patch.
...
> Please remove the #ifdef CONFIG_I2C
OK.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
...and update all users. The header file can be used on mx51 and mx53.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The register based fuse readout is not available on i.MX27/31
SoCs, so make explicit sensing the default.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Do not depend on the specific SoCs for the IIM module, but
instead exclude the one that don't have this unit.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The IIM module uses two drivers, one for the general IIM
module and one for the individual banks.
This patch turns this into a single driver to ease registration
of the resources. This changes the user visible behaviour in
the way that the explicit_sense_enable and permanent_write_enable
device parameters are no longer bank specific but for the
whole device. Also, the IIM module supports a maximum of
8 fuse banks, with these patch all of them are registered, even
if they are not present in a SoC.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX Processors support two different boot modes, the internal
boot mode and the external boot mode. Traditionally the external
NAND boot mode is handled in drivers/mtd/nand and the internal
boot mode is handled in arch/arm/mach-imx. This patch consolidates
the handling of both boot modes in arch/arm/mach-imx so that
the user does not have to look in the mtd kconfig section for
booting from NAND. Also, selecting between internal and external
boot mode now is a clear choice.
The external NAND boot mode has been independent of the mtd nand
driver, but as the code was contained in the NAND driver it was
not possible to support booting from NAND without a mtd nand driver.
This is changed with this patch.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
At least partly. We have pads in barebox that we do
not have in the kernel. Also, this with this patch we
do not set the sion bit which the kernel does.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without this patch (against next) I get this:
rsc@thebe:barebox$ make ARCH=arm CROSS_COMPILE=<path>/arm-v5te-linux-gnueabi- menuconfig
HOSTCC scripts/kconfig/lxdialog/checklist.o
HOSTCC scripts/kconfig/lxdialog/inputbox.o
HOSTCC scripts/kconfig/lxdialog/menubox.o
HOSTCC scripts/kconfig/lxdialog/textbox.o
HOSTCC scripts/kconfig/lxdialog/util.o
HOSTCC scripts/kconfig/lxdialog/yesno.o
HOSTCC scripts/kconfig/mconf.o
HOSTLD scripts/kconfig/mconf
scripts/kconfig/mconf Kconfig
warning: (ARCH_IMX25 && ARCH_IMX27 && ARCH_IMX35 && ARCH_IMX51 && ARCH_IMX28) selects ARCH_HAS_FEC_IMX which has unmet direct dependencies (ARCH_IMX)
warning: (ARCH_IMX25 && ARCH_IMX27 && ARCH_IMX35 && ARCH_IMX51 && ARCH_IMX28) selects ARCH_HAS_FEC_IMX which has unmet direct dependencies (ARCH_IMX)
Add the option for the FEC on MX28 as well.
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Saves the boot source into an environment variable so env scripts
can more easily use boot source information.
Note only tested on imx35. I haven't added support for any other variants
because I'm not familiar with them. (And can't test them anyway).
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
NAND_IMX_BOOT is related to the external boot mode, so do not
select it when using internal boot mode.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This (re)enables boards to have multiple boot headers so that the one
image can be used for booting from multiple boot sources.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
At least the FEC and the CAN controller drivers can also be used by the i.MX28.
When still used by IMX, the i.MX28 (and maybe i.MX23) related code must be
ignored.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Simplifies specifying gpio numbers from bank/number info.
From linux kernel.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The patch introducing device macros for i.MX accidently registered a
imx-mmc device for i.MX25/35/51. It should be a imx-esdhc device. This
patch fixes tis
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fix following compilation warning:
../devices-imx31.h: In function 'imx31_add_fb':
../devices-imx31.h:34: warning: passing argument 2 of 'imx_add_ipufb'
from incompatible pointer type
Signed-off-by: Marek Belisko <marek.belisko@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
include/common.h declares this as "unsigned long addr", so we unify it.
This also silences a doxygen warning.
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
via
default ARCH_IMX_INTERNAL_BOOT_NAND
and not default y on ARCH_IMX_INTERNAL_BOOT_NAND
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Makes the internal boot source configurable.
Also changes section names slightly so that .flash_header_0x1000 isn't
matched to .flash_header_0x100* etc.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
commit 5bd9c57d575126448c7d325547538a55e5cd81d6
Author: Juergen Beisert <jbe@pengutronix.de>
Date: Fri Sep 24 14:51:42 2010 +0200
Fix watchdog's register size for the i.MX27 CPU
The watchdog registers on the i.MX27 CPU are 16 bit registers. This patch
just fixes the access macro.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
before if you specify id = 0 the next available id will be taken
otherwise fail if already registered now as in linux we use -1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This driver provides an interface for programming and sensing the IIM fusebox
which is present on some i.MX chips.
Since the IIM io addresses of the controlling registers and each fuse bank are
are not contiguous the driver implementation uses two drivers, imx_iim, and
imx_iim_bank. The imx_iim is the "parent" driver for a device holding the
map_base address of the control registers. The imx_iim_bank driver is for
child devices holding the map_base of each fuse bank. The platform code then,
instantiate one imx_iim_bank device per fuse bank.
Fuses blow is a dangerous operation. Thus, the fuses blow functionality can be
disabled independently at configuration time. On run time this functionality
must be enabled explicitly by setting the permanent_write_enable parameter.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows the use of IIM registers from code which is not mx35 specific.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Apparently, the UID is little-endian. Reverse endianess, and add a note in
comment.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Kernel pin definitions are more complete and up to date. Being
here we also use seperate files for the iomuxer like the other
i.MX SoCs already do.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On barebox-next, I get:
board/freescale-mx25-3-stack/built-in.o: In function `go':
3stack.c:(.flash_header_start+0x0): undefined reference to `_start'
board/freescale-mx25-3-stack/built-in.o: In function `imx25_3ds_fec_init':
3stack.c:(.text.imx25_3ds_fec_init+0x4): undefined reference to `mc34704_get'
3stack.c:(.text.imx25_3ds_fec_init+0x1c): undefined reference to
`mc34704_reg_write'
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this modules is based on Freescale's i.MX357 CPU, with 128MB of
mDDR, 256 MB NAND, and ethernet PHY.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This boards integrates 64mB of DDR, a 256MB NAND flash, a RMII Ethernet PHY
and a i.MX257 CPU.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The value read at the pin is provided by Sample Status Register, not the
Data Register.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Newer Freescale 3-Stack development systems are equipped
with 64MiB of DDR2 SDRAM, instead of the 128MiB of mDDR SDRAM
with which earlier versions were shipped.
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch allows using the i.MX (LCDC) framebuffer driver on boards
using an i.MX21 SoC.
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows the iomux to reconfigure these pins which are opendrain at
power on and thus can't drive the LCD.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Using these macros simplify the configuration for special GPIO usage. But they
should use correct bit positions for usage in the IOMUX_PAD() macro.
Note: These are the bit positions of the i.MX35 CPU. Not checked for the other
i.MX3x CPUs.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Recent changes to the nand_imx driver broke it for i.MX21 systems;
the i.MX21 NAND controller is more akin to the one in i.MX27/i.MX31,
than to the one in i.MX25/i.MX35.
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Building i.MX35 3stack support without the I2C drivers
does not make much sense as the board will trigger a
watchdog timer soon after start.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
FMCR is (*((volatile u32 *)(x))) (0x10027814) and thus this leads
to a data abort.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The flash header is used on different i.MXs other than the
i.MX25, so rename it. Also, add a possibility to put a flash
header on different offsets (0x100, 0x400 and 0x1000), needed
for different boot mediums.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The SOM can integrate a 16550 Quad UART which can be used
for serial console.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
64MB strataflash consist in 2x256Mb flashs. So we must declare
2 cfi_flash in order to have both 256Mb flash geometry properly
detected. For flash <= 32 MB we prefer not to register the second
cfi_flash which would be an alias of the first one.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add a menu entry and proper settings for 128MB and 256MB
RAM size.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adding IPU clock query functions for i.MX31 and i.MX35
(used to generate their LCD timing).
BTW: All functions are declared with the 'ulong' return type, but some are
defined with 'unsigned long'. And yes, its the same, but IMHO one type should
be used for all.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add some (helpful?) comments about the meaning of 'framebuffer' and
'framebuffer_ovl' structure members.
Signed-off-by: Juergenn Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The gpt clock on MX35 is connected to the ipg clock. But the
implementation uses the ipg_per clock.
This patch lets the gpt use the ipg clock and introduces the
ipg_per clock.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
instead of select first the board which will select the arch, now
first choice the arch to filter the possible boards
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
No need to check for maximum argument counts. The commands are
safe to be called with more arguments, so lets safe some bytes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
u-boot-2.0.0-rc8
Correct arm and ahb clock calculation.
Write CLKO divider to register
Signed-off-by: Andreas Adam <A.Adam@phytec.de>
Signed-off-by: Jan Weitzel <J.Weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
GPIO_DR ist defined already as GPIO_GPIO in imx-regs.h. There's no need to
define archdependent GPIO_DR. This one fixes a regression brought in by
d5ec92129e
Signed-off-by: Luotao Fu <l.fu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We need this function for MX35 support since the uart clock is not
equal to perclk1 anymore. Uh, it's really time to implement some
real clock API instead of this cruft.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There seems to be a bug in the i.MX27 used on .0 and .1 module
revisions which breaks SPCTL0 setup. There, SPCTL0 is reset to
0 after reading it causing e.g. a bad USB clock. Hence, this
patch writes back the read value.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Make the frequency output a little bit nicer
From: Robert Schwebel <r.schwebel@pengutronix.de>
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>