The Efika MX Smartbook is a i.MX51 based netbook. This patch adds
nearly full support for it including:
- USB
- SD card slots
- Internal SPI NOR flash
- Internal flash PATA drive
- LEDs
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The board variant found on the AT24 EEPROM holds the variant ID that we
can use to identify which expansion board we are running on and thus
which device tree to load and pass to the kernel.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The AT24 found on the expansion boards store the variant of the board it
is soldered onto.
That means that we are that way able to determine what expansion board
is currently plugged in if any. If we can't communicate with the EEPROM,
we just assume that only the CFA-10036 is there.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This EEPROM is found on the expansion boards available for the 10036
module. Since we won't need to do anything fancy except reading/writing
from it, use bitbanging to communicate with it.
This EEPROM will hold mostly the board_id so that we can determine if
there is an expansion board plugged in and what expansion board it is.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Trivial pbl support has no cpu specific setup.
We will add cache setup routines in the future.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch is based on ARM pbl support and allows
creating a pre-bootloader binary for compressed image.
For different MIPS SoCs (or even for different boards based
on the same SoC) the operations carried on in start-pbl.S
can be very different. The additional constraints can be imposed
on the size of the boot code or the special magic labels in
the beginning of the boot code; In some cases it could be
necessary to show CPU is alive as early as possible
(transmit a char via UART or blink a LED).
So the demands for pbl start operation can be very different.
E.g. malta board store boot code at the NOR flash mapped
to the MIPS power-on address (0xbfc00000); it is the most
simple case: we need just copy pbl image from direct-mapped
flash to RAM and jump there.
The XBurst-powered boards store boot code in the beginning
of a NAND flash or in the beginning of SD/MMC card.
In this case we must use simple and short NAND or SD/MMC access
routines to copy pbl image to RAM.
To meet so different demands a simple technique is selected:
* MIPS pbl entry point located in file arch/mips/boot/start-pbl.S.
* MIPS pbl code (see start-pbl.S) assumes that every pbl-enabled
board has a arch/mips/boards/<BOARD>/include/board/board_pbl_start.h
header file. This file must contain definition of
the board_pbl_start macro. This macro is used as start of pbl image;
* the most popular asm routines (stack setup, relocation to link
address, NS16550 initialization (WIP) and so on) are containt
in the arch/mips/include/asm/pbl_macros.h header file.
So board pbl macro can use it if necessary.
It is possible to create similar headers with macros for each
specific SoC; so even if we have many different boards based
on the same SoC the board_pbl_start macro for every board
can be short and clear.
* after board-specific initialization the stack pointer
is initialized and pbl C code is started.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ULPI lines are normally input to the USB port. In order to configure
the ULPI transceiver properly the ongoing transfers must be stopped. This
can be done by configuring the the STP pin as gpio output and drinving
it high.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Register the USB misc devices and provide convenience wrappers to
register the USB ports for i.MX27.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The smsc911x has a bootstrap pin for detecting an external phy.
Unfortunately this is pulled into the wrong direction on the pcm037
board, so force internal phy with platform data.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX27/31 have the second chip select enabled by reset default.
This can be considered as a hardware bug, because even boards which
need this settings cannot work out of reset because of the missing
initialization sequence. Detect this reset default setting and disable
this chipselect then to be able to properly detect the SDRAM size.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
omap3 has a soc specific reset function, make sure it calls common_reset
so that the proper CPU flags are set.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We allow unaligned accesses on ARMv6 onwards, make sure the CR_A
flag is cleared so that unaligned accesses do not trap.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Barebox not contain symbol HAS_PCI, so remove all references to it.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Barebox not contain symbol HAVE_MMU, so remove all references to it.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Barebox not contain symbol HAS_CFI, so remove all references to it.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides a global cleanup barebox Kconfig files. This includes
replacing spaces to tabs, formatting in accordance format, removing
extraneous lines and spaces. No functional changes.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The fec has multiple clock inputs:
- 50MHz clock for generating the (R)MII clock
- bus clock
The MDIO clock is derived from the bus clock, not the 50MHz clock,
so pass this into the driver so that it can correctly configure
the MDIO clock divider.
This fixes several wrong MDIO register read problems on i.MX28 boards.
Reported-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for the Garz+Fricke Vincell board. This has
a i.MX53 Processor with 512MB of DDR3 RAM.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for initializing DDR3 RAMs on the i.MX53 type
SDRAM controller. The code automatically detects size/layout of
the connected RAM, detects the bus width and which chipselects are
populated.
While I believe this code is not 100% generic, it is far too
sophisticated to stay in a single board directory. I'm sure
other boards could make use of this aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pll setup function is exported, so it makes sense to export
the convenience wrappers for specific frequencies aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some boards do not have a DCD table since they initialize everything
in code, so allow to skip it and leave the corresponding pointers
empty.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The code initializing the SDRAM controller is not at the same
place where SDRAM is registered with barebox. To reduce the
risk of registering wrong SDRAM sizes this patch adds a
driver for the ESDCTL which reads back the configured SDRAM
size and registers the memory found with barebox.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In recent reference manuals the plls were renumbered. PLL8 now is
PLL6 and vice versa. Change the code according to the reference
manual to avoid confusion.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ethernet PLL has a fixed frequency of 500MHz. What is adjustable
are additional dividers which we better describe separately.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add and use meaningful macro names for OMAP4 GPIO addresses, and add a
comment to explain the 0x100 offset for OMAP4.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In addition, collapse adjacent comment blocks into one and remove
extraneous blank lines.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds lowlevel debug functions for i.MX. As we have a great variety
of different UARTs on i.MX currently no Kconfig support for chosing the
correct one is added. Instead we expect the user to add the correct
define and issue a compiler warning if he hasn't.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
putc already is a regular barebox function. To avoid conflicts and
confusions just let architectures define PUTC_LL directly instead
of going through this addiotional redirection.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Pinmuxing was wrong and no GPMI device was created.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
structure is used within barebox only and there is no need to pack it.
As this option has a negative performance impact, remove it.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Pass the buffer size to the file detection code. This makes sure we do not
read past the buffer. This is especially useful for ext filesystem detection
as the magic is at byte offset 1080. Also introduce a FILE_TYPE_SAFE_BUFSIZE
define which is set to the minimum bufsize the detection code needs to detect
all known filetypes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The commit
commit d25d94bea6
Author: Antony Pavlov <antonynpavlov@gmail.com>
Date: Fri Jun 1 13:23:20 2012 +0400
MIPS: make possible board-specific header files
This patch makes possible to put a board-specific
header file (e. g. foobar.h) to arch/mips/boards/*/include/board/.
breaks the out-of-tree build for the boards that use it (rzx50).
Reported-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
today the timer rate is hardcoded to 6MHz which is wrong the PIT rate is MCK / 16
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we now create the cdev via mtd
This will also simplify sync with linux
to avoid the m25p8000 or m25p00 the cdev is still named name m25p and the
drivers m25p80
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since commit dc9d70e2 the define CCM_PDR4 is called MX35_CCM_PDR4.
sha: Added the same for cupid
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Update help info, it's slightly out of date, and a grammatical fix.
No functional change.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch sets HPM (Host power mask bit) to bit 16 according to i.MX
Reference Manual. Falsely it was set to bit 8, but this controls pull-up
Impedance.
Reported-by: Michael Burkey <mdburkey@gmail.com>
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as in the kernel use is_rmii
flags for pinctrl
phy_flags for phylib flags
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There is no need to add the command name to the "usage" info when
defining a command.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as the support atmel mci drivers does not work on rm9200 and we have the
possibility to use it as spi use it
Originally on rm9200 when the interface mci is in SPI mode we use a DataFlash Card
so allow it but if no dataflash card option is enable use as mmc spi.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
on the 9g20 low power version we have a mmc spi as microSD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
on the 9g20 low power version we have a mmc spi as microSD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
on all the cpu module we have a at25 except on the cogent where we have a at45
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio as the hw ip is broken
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio as the hw ip is broken
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio as the hw ip is broken
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio as the hw ip is broken
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio as the hw ip is broken
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio until we add the hw drivers
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The OUI will be 'tml' => 76:6D:6C
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The modules from cogent use a 1.8V nand
And have the mci card detect broken as they use the flash vdd as vdd for the
cd which need > 2V
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
for bootp specify the module version via client_id as
%{BOARD}-%{VERISON}
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The OUI will be 'ron' => 72:6F:6E
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The OUI will be 'ron' => 72:6F:6E
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The OUI will be 'ron' => 72:6F:6E
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fixes a linker error when PBL_IMAGE=n and DO_LOW_LEVEL_INIT=n.
In this configuration the symbol reset() was present multiple times,
and prevented the barebox image to be linked.
Signed-off-by: Christian Kapeller <christian.kapeller@cmotion.eu>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch remove a superfluous DCD command in TX53-xx30 flash header.
The entry DCD_WR_CMD(0x21c) just duplicates the contents of the last
imx_flash_header_v2 struct member dcd.
Removal of this DCD entry is needed to make the TX53 board boot again
from NAND.
Signed-off-by: Christian Kapeller <christian.kapeller@cmotion.eu>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
the phy reset neet to be done before the fec driver is registered
as we accesst the phy at the fec probe time
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In the nios2 generic board generic.c file, use the
new barebox_add_memory_bank to init ram memory.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
the rm9200 have a errata the cs0 must be used via hw cs not gpio
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Switch to new environment and add the bootscripts needed for mmc. Also,
update defconfig for new environment.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Needed so that the linker can throw it away when unused. This is needed
at least on current master for being able to enable pbl support for omap3
boards.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds generic board support (CLEP7212, Linux ARM ID=91)
for CLPS711X-target.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a simple serial driver for CLPS711X architecture.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds new architecture (CLPS711X) into barebox.
The core-logic functionality of the device is built around an ARM720T
processor running at clock speeds up to 90 MHz.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The idea of having /env/init/* scripts was to make the configuration
more flexible and customizable for boards. It turned out though that
people (including myself) do not find the place where they should
change these settings.
So this patch brings back /env/config for defenv-2. The individual
env/init/* scripts are removed and their content is added to
/env/init/config-board. This makes the values from /env/init/config-board
the board specific defaults which can be overwritten in /env/config.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The added complexity of bootargs-ip-* and bootargs-root-* makes
understanding defenv-2 more complicated. remove them and open
code the scripts instead in their users.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The same issue was fixed in the Linux kernel in commit
66ddfc6 (mx35: add a missing comma in a pad definition)
for 2.6.33-rc7.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
barebox size is 384KiB
and for the official atmel release we need to rootfs at 8M
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Took the mx28evk defconfig, activated DMA and NAND, used savedefconfig;
this patch is the result.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
While flash layout may be custom, at least the nand0-device is good to
have.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These routines can fail, add support for that. Also, put in missing
copyright headers.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
now we can flash barebox by itself as the bootstrap need to use pmecc
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch is from linux 3.7-rc1 and adapt to Barebox
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Otherwise we get the following warning when sdl is not installed
on the compile host:
Package sdl was not found in the pkg-config search path.
Perhaps you should add the directory containing `sdl.pc'
to the PKG_CONFIG_PATH environment variable
No package 'sdl' found
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We support two different board revisions, both of which only differ
in the dcd table, so we can support both in a single binary with the
cost of storing both dcd tables in the binary.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for an update handler for internal boot. Currently
handled are:
- v1 MMC/SD
- v2 MMC/SD
- v2 NAND
where v1 is found on i.MX25, i.MX35 and i.MX51. v2 is found on i.MX53.
This code intentionally does not use the DCD data compiled into every
i.MX internal boot image. This makes it possible to make a pure second
stage barebox bootable on i.MX internal boot devices later.
This has been tested on the i.MX51 babbage, i.MX53 loco and i.MX53 tx53
board.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The KARO Tx53 board in the revision 8030 has an instable SDRAM
setup. It works as long as the MMU is disabled, but the board
crashes at arbitrary places once the MMU gets enabled. So we
need the PLL setup early. Enable it for pbl.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This redefines the sdram controller registers as offsets to the base
rather than as absolute addresses. All users are fixed to use the
SoC specific base address.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We now have request_sdram_region to request a region. Use
it instead of a comparison with MALLOC_BASE.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This was once disabled because we had no board support. This has
changed, so enable the S5P board support in the config so that
the friendlyarm_tiny210_defconfig actually builds for the correct
machine.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
board_init_lowlevel is no longer called from generic code, so we can't
just return from in. Instead we have to jump to board_init_lowlevel_return
manually. For the a9m2440 board one case was missed to convert. This
is broken since:
| commit faf7b7af6e
| Author: Jan Luebbe <jlu@pengutronix.de>
| Date: Mon Sep 24 10:18:34 2012 +0200
|
| ARM: give boards control of the reset entry point
|
| On some SoCs (for example AM35xx), the ROM bootloader passes useful
| information in r0 when jumping to barebox.
|
| To avoid overwriting this in the generic reset code, we introduce
| common_reset as a C function and as an assembler macro. This is then
| called form the reset entry point (either in common or in board code).
|
| This patch is based on code by Sascha Hauer <s.hauer@pengutronix.de>.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Rather than doing this in the SoC specific code just print
it in imx_set_silicon_revision. This saves some lines of code
and also results in i.MX27 now also having the silicon revision
printed during startup.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This moves the known i.MX bootsource settings to a single file
so that the code can be shared. Also we add a enum for the different
boot sources so that it can be used in C Code and not only on the shell.
The pcm038 board is changed to use it instead of digging in the registers
manually.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Function add_image needs a allocated malloc space.
This is only available in the second getopt loop.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The different ARM architectures need different cache functions. This
patch makes them selectable during runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without MMU enabled we do not need to call __mmu_cache_* as the
caches are not enabled. Calling flush_icache() before jumping
to new code is enough.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The exception handlers need some space to write to. Traditionally
this has been some stack space. This is not necessary at all, so
just use some variable and get rid of the compile time fixed stack
address.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On i.MX we enable all necessary clocks during startup of the clock
controller driver, so we do not need the register hacking in the drivers
anymore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Once we run on multiple SoCs we must know which arm architecture we
are on. Add cpu_architecture() from the kernel to detect it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- increased the region size for OMAP3, as it was not correct
- decrease region size for OMAP4 to prevent overlapping.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As the gpio functions are not available at this point, set the gpio manually.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
start() for the PBL case is a duplicate of board_init_lowlevel_return().
Instead of duplicating it just call it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The at91sam9260ek has a custom reset function which does the same thing
as the default function. Also it does not define MACH_HAS_LOWLEVEL_INIT
as it should do. Remove the function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- for i.MX1 the register is in the System Control unit, so move
the code to arch/arm/mach-imx/imx1.c
- for the other i.MX the register is in the watchdog unit, so move
the code to drivers/watchdog/imxwd.c
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
of_alias_get_id() returns the number of the gpio bank, so we have
to multiply with 32 to get the gpio base.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- Add a separate header file for the iomux-v1 just like done for
iomux-v3.
- initialize iomux from SoC code so that we do not depend on IMX_GPIO_BASE
anymore.
- define registers as offset to the base rather than absolute addresses
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All i.MX SoCs now use the same imx_silicon_revision() function to get
the revision. Add a separate header file for it and a common function
used on all SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sometimes Assembler beats C. In this case a small assembler
function called without parameters can:
- copy a binary to its link address
- clear the bss
- return to the same position in the copied binary
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
update gpiolib to select GENERIC_GPIO and provice a generic header
use is on versatilepb
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Merge tag 'gpio_arm' of git://git.jcrosoft.org/barebox into for-next/gpio
add gpio primcell pl061 support
update gpiolib to select GENERIC_GPIO and provice a generic header
use is on versatilepb
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This adds the device id mechanism to the i.MX fec driver and
uses it to determine the fec version. Also adds devicetree
probing support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We called create_sections with 4096MB as size argument, but create_sections
expected the argument in bytes, so create sections was completely optimized
away due to the size >>= 20. This patch changes the size argument to be in
megabytes and adjusts map_cachable to pass the argument in megabytes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We can't do anything useful in the error function, so we just hang.
This has the advantage that at least when a JTAG debugger is connected
we can see what happens. Otherwise the code just jumps to NULL in case
of an error.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since we have phylib the phy won't be detected after poweron. It seems
the phy needs some time after reset.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- The i.MX1 timer does not have IPG clock as source, so rename
the define accordingly
- for the i.MX31 timer we want to use the per clock, not the ipg
clock.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The old clock support is now unused. Remove it. The former i.MX clko
command is superseeded by generic clock manipulation commands.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
