Start a 2nd stage barebox with the Linux Kernel calling convention.
Right now barebox does not interpret ATAGs or devicetree passed
to it, but it doesn't hurt to pass parameters so that future bareboxes
can use them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As the place for the atags now is determined automatically the call
from the boards can be removed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If a board does not specify a place for the atags list default to
SDRAM start + 0x100. The vast majority of boards uses this place
anyway, so the call to armlinux_set_bootparams() can be removed
for most boards.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
without "#ifndef __ASSEMBLY__ #endif", an assembly file
including this file will break compilation.
Signed-off-by: Du Huanpeng <u74147@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The IPU has a fractional pixelclock divider. When used, this produces
clock jitter which especially LVDS transceivers can't handle. Allow
to disable it via platform_data.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With the IPU the way the display is connected is completely independent
of the framebuffer pixel format. So instead of specifying a pixel width
in platform_data we have to specify how the display is connected.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The OpenCores 10/100 Mbps ethernet MAC is often available on
OpenRISC-based SoCs and is supported by the OpenRISC architectural
simulator (or1ksim) as well.
The patch enables the driver on the 'generic' openrisc board.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
am33xx_register_ethaddr must be called before cpsw driver start.
Move it from devices_initcall to coredevice_initcall.
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
add compatible phytec,pcm051
clean up pinmux_emac_rmii1_pins
introduce davinci_mdio_default pin group
set AM33XX_MAC_MII_SEL via dts rmii-clock-ext
use bch8 as ecc mode
add pagesize to 24c32@52
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Beaglebone and the AM335x Phytec phyCORE can be compiled
together, so merge the configs into a am335x_mlo_defconfig.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Storing the boot information in the image itself and passing a pointer
around between images is cumbersome and doesn't fit well with multiimage
support where the pointer we pass around is already occupied by the
devicetree.
Do the same as U-Boot does and store the boot information at the bottom
of the SRAM public stack.
To maintain the compatibility between new xloaders and older barebox
binaries we still pass the boot information to the next stage via pointer.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
barebox needs it to initialize the memory. While at it, give the
beabglebone black another name than the original beaglebone has.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As with devicetree support the binary will get too large for the
SRAM drop the configuration. It was mainly meant for debugging purposes
anyway.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This switches the am335x Phytec phyCORE to devicetree probe support.
For now we use a linked in dtb.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
An entry function should begin with a exception header. For this to work
properly the entry function should not contain any code which gcc might
put before the header. To make this sure change the ENTRY_FUNCTION macro
so that it generates one function which only contains the exception header
and a second function which contains the original body of the entry function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The multi image startup process used to have three binaries involved:
- The lowlevel board code to initialize SDRAM
- the uncompressor
- the regular (compressed) barebox binary
Drop the uncompressor and put the uncompress code into the lowlevel
board code binary. This makes the startup process easier.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Update the IO configuration to the Quartus v13.1 version. This seems to fix a
stability issue under the linux kernel when started with barebox.
As this is undocumented, autogenerated stuff, one can not be sure what it really
does nor if it really fixes the problem or just relocates it.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This updates/changes the sdram config for the sockit to the quartus v13.1
autogenerated version.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The DTS file for MBa6x is imx6q-mba6x.dts, so it looks like this file
doesn't make any sense.
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The definition if the FEC is used is made by the baseboard (MBa6x), not
by the module (TQMa6x). Move it there.
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use the new Quartus II v13.1 generated sequencer_defines.h file.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Quartus II v13.1 generates updated sequencer.[ch] files.
Integrate the changes into the current driver.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Running at 1GHz, rather than 13MHz certainly makes things a bit faster.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We run the system bus from the OSC clock during init, to avoid crashing
the system while reconfiguring the PLLs.
Switch to a more reasonable clock when we are done with this.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Before we jump to SDRAM where we just copied our code we have to
invalidate the instruction cache.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently unused in barebox, but useful for bootstrapping a tx25
from USB where a imx-image is needed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a devicetree-only driver for to configure the gpmc and its
child devices from dt. Currently only NAND is supported.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- make debug messages more meaningful
- calculate value once and use it to print and configure instead
of calculating it twice
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We want to check whether boarddata contains a valid dtb if it's inside
valid memory. This includes the base of SDRAM, so use '>=' instead of '>'.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Broken since:
| commit 72e561b5e8
| Author: Sascha Hauer <s.hauer@pengutronix.de>
| Date: Fri Jul 19 12:07:05 2013 +0200
|
| ARM: omap4: Use writel where appropriate
|
| Instead of making a pure 32bit write to a read/modify/write
| operation with sr32 use writel directly. This saves a few bytes
| of binary space.
|
| Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This introduces a single omap_init function which detects the
SoC and does all further SoC initialization. This is done to get
rid of initcalls without proper SoC protection. The same has been
done for i.MX already.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The omap3 and omap4/am33xx spi cores differ in the offset of the
registers in the address space. Instead of encoding this into the
resources use the platform_device_id mechanism. This is done in
preparation for devicetree probe support where the address space
is in the devicetree and can't be adjusted.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since we use the generic ns16550 driver we need the regshift property
to correcty access the UART.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For making #include <dt-bindings/...> work
We already have the necessary -I flag in dtc_cpp_flags, no nothing
needs to be done here.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The image will be named after the official name of this board:
barebox-freescale-mx6-sabreline.img
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Pull the board device reset GPIO pin high as this prevents
PCI bus probing.
The function da923rc_board_init_r is called at the postcore
initcall level so that the udelay function can take advantage
of the core initialisation.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The clock frequency property of the device tree node fsl,mpic is
added as it is needed by the PCI driver to function in newer
Linux version.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current implementation of the bootloader specification depends on the
hardware name and the name of the device in /dev to match. As the default
hardware name is mciX and the device name is diskY the bootloader spec
cannot be used as is.
This patch implements a way to overwrite the device name similar to what is
possible for the imx-esdhc driver.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds an .oftables section right before .dtb section with
BAREBOX_CLK_TABLE to ARM linker script.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Due to unwind tables being generated by recent versions of gcc by
default, the x86 Barebox link fails with:
ld: section .eh_frame loaded at [00000000000197c4,000000000001f31f]
overlaps section .barebox_initcalls loaded at [00000000000197c4,0000000000019833]
Passing -fno-unwind-tables -fno-asynchronous-unwind-tables avoids this
problem.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
"%d" in format string requires a signed integer.
"%u" in format string requires a unsigned integer.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides a global cleanup barebox Kconfig files. This includes
replacing spaces to tabs, formatting in accordance format.
No functional changes.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
"%d" in format string requires a signed integer.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
asm/hardware.h does not have any content except including mach/hardware.h.
include mach/hardware.h directly where needed and get rid of asm/hardware.h
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
A lot of files rely on include/driver.h including include/of.h (and
this including include/errno.h. include the files explicitly so we can
eventually get rid of including of.h from driver.h
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add the Kconfig and Makefile directives to build barebox
for the GEIP DA923RC board.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The use of the DDR driver as well as early I2C support is
enabled for board initialising their memory through SPD EEPROM
data.
A SOC specific function returning the DDR bus frequency
is added for the DDR driver to translate DDR timings to
register values.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Because the port count is different between the MPC8544 and
existing CPU support, the Ethernet port count is defined on
a per CPU basis.
Accordingly, the TBI PHY initialisation code is updated.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Definitions are added to support the mpc8544 sOC.
The function returning the I2C bus frequency is updated
to take into account the mpc8544 specific clock ratio.
A mininal GPIO API is added to enable and set the GPIO
out pins.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If drivers want to fixup their specific instance they need some context
to know which instance they have to fixup.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use the mailbox driver to set up a framebuffer based on the firmware
configuration.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add the missing "right" field to struct bcm2835_mbox_tag_overscan.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i.MX5x OTG port is hardwired to the internal UTMI PHY, so having
this configurable makes no sense and helps using this port with DT.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
not all board have a SD card.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since the mainline kernel now has its own dr_mode and phy_type DT-options
for setting modes of USB ports, do these kernel parameters compatible by
removing "barebox" prefix.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The name of the raw device is mtdraw<num> which is inconsistent to other
mtd devices which are named mtd<num>.<partname>. Rename it to mtd<num>.raw.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this fix :
arch/arm/mach-mxs/bcb.c:268: error: too few arguments to function 'chip->ecc.read_page_raw'
arch/arm/mach-mxs/bcb.c:309: error: too few arguments to function 'chip->write_page'
caution : this is NOT runtime tested.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
GXemul is another MIPS emulator with Malta board support.
As opposed to qemu GXemul supports only fixed GT64120
YAMON-compatible PCI mapping.
As now barebox uses YAMON-style mapping we can
use GXemul for barebox run.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There are some reasons for using YAMON-style memory map:
* we can run Linux kernel from barebox;
* we can use GXemul for running barebox.
YAMON-style GT64120 memory map make move UART to the new position.
The files gt64120.h and mach-gt64120.h are imported from Linux.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On MIPS Technologies boards 0x1fc00010 address
is reserved for BoardID. The hardware or emulator
intercepts accesses to this address and we can't use
this address for storing code.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On 8 February 2013 MIPS Technologies was acquired
by Imagination Technologies. Now the http://www.mips.com/ site
is redirected to http://www.imgtec.com/, the Malta development
board page is unreachable.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use the mailbox driver to query the size. This properly takes the
firmware's VideoCore/ARM memory split into account.
Linux can now be booted with more than 128 MiB.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use the mailbox driver to query the clock frequency and create
a clkdev for the bcm2835_mci driver.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows exchanging data with the on-SoC GPU.
Based on U-Boot code by Stephen Warren.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
RPi's mailbox driver is used early and it needs clock functions to
handle timeouts.
Register the driver straight after its clkdev.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Drivers currently cannot implement explicit cache handling and rely on
running the same code before and after mmu_initcall() without crashing.
Depending on the chosen config options, the cache functions are not yet
setup and using them early on ends in a null pointer dereference.
The RPi's mailbox driver is such a case; it requires cache handling once
the MMU is fully set up and yet the RPi setup needs to use the driver to
get the memory size before mem_initcall() and hence mmu_initcall().
Fix this by checking the cache_fns pointer before dereferencing it.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When using CONFIG_MMU_EARLY combined with CONFIG_PBL_IMAGE, the barebox
setup reuses the MMU setup from the PBL, but doesn't setup the cache
functions.
Set these up to guarantee proper early cache handing before mmu_initcall().
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Similar to the OMAP boards mount the SD card to /boot and expect
the environment as /boot/barebox.env
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For DDR2 RAMs, regs->zq_config is not used, which causes the
AM33XX_EMIF4_0_REG(SDRAM_CONFIG) register to be left unconfigured, resulting
in boot failure.
It seems that the DDR2 case was missed during the consolidation in commit
9f122f8bf0. The actual call for the Bone was
removed in 88659d9c4a.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The function am33xx_get_cpu_rev may be called before barebox_arm_entry(),
so we need to avoid switch statements. One example is the BeagleBone,
where we use this function to differenciate between the white and black
variants.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To keep things clean I removed all support for the old way to build
images. There is now a single tegra_v7 defconfig which builds both
supported Tegra boards as images.
The new image generation also paves the way for integration of the
tegra-cbootimage tool to produce directly flashable images.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that tegra arch is both DT only and forced relocatable
there is nothing interesting left in here.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There is nothing technically preventing a single Tegra 20/30
image to be built. Don't force this split in Kconfig.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Drop useless BUG(), we are too early for them to be of any use.
Make sure we build the AVP code as ARMv4 even in PBL case.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It seems GCC 4.8 tries to be clever by not inlining some of those
functions. This causes havok, as it's absolutely required to inline
the early startup function, otherwise we may end up calling ARMv7 code
on the ARMv4 AVP.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fixes:
arch/mips/mach-bcm47xx/include/mach/debug_ll.h: In function 'PUTC_LL':
arch/mips/mach-bcm47xx/include/mach/debug_ll.h:33: warning: passing argument 1 of '__raw_readb' makes pointer from integer without a cast
arch/mips/mach-bcm47xx/include/mach/debug_ll.h:34: warning: passing argument 2 of '__raw_writeb' makes pointer from integer without a cast
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fixes:
arch/arm/boards/vexpress/init.c: In function 'vexpress_core_init':
arch/arm/boards/vexpress/init.c:139:22: warning: 'hostname' may be used uninitialized in this function [-Wmaybe-uninitialized]
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fixes:
arch/arm/boards/edb93xx/edb93xx.c: In function 'edb93xx_console_init':
arch/arm/boards/edb93xx/edb93xx.c:123:2: warning: implicit declaration of function 'free' [-Wimplicit-function-declaration]
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This introduces some new environment variable helpers and updates
the existing ones. Newly introduced are:
getenv_bool: read a bool variable
getenv_ul: read an unsigned long variable
getenev_uint: read an unsigned int variable
getenv_nonempty: like normal getenv, but does return NULL instead of an
empty string
All new helpers take a pointer to the value. This value is only modified
when the variable exists. This allows the following programming scheme:
unsigned int myvalue = sanedefault;
getenv_uint("myvalue", &myvalue);
So without checking the return value myvalue contains the best possible
value.
getenv_ull is updated to this scheme.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The driver didn't work well with at24 driver. NACKS are lost.
Errors are lost in isr due to the local variable err. Also we didn't wait for
bus free in omap_i2c_xfer_msg.
Fix issues and get other improvements from linux kernel
Tested on OMAP4 and AM335x
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The OMAP ROM code passes the boot information via r0 to the
bootloader. Add an OMAP specific barebox handler to pass this
information to the next stage. This allows us to chainload
bootloaders without loosing the information where we booted from.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Include mach/generic.h where omap_set_bootmmc_devname is declared.
Change the argument of omap_set_bootmmc_devname to const char *
to fix the resulting conflicting prototypes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will be used to force the update or the start test mode
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The bootm code is now independent from the actual bootm command, so
compile the ARM specific bootm code based on CONFIG_BOOTM and not on
CONFIG_CMD_BOOTM.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The data caches should be invalided once during startup. This should
also be done when we do not have the MMU enabled in barebox because
the Kernel does not invalidate the caches during start.
To make this sure this patch enables the arm_early_mmu_cache_invalidate
function even if MMU support is disabled. Additionally this patch adds
calls to arm_early_mmu_cache_invalidate in start.c and uncompress.c.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some of the irq can still be on after a reset or power on as the IP are
powered by the backup power. This could lead to an interrupt dead lock
when the kernel boot. So disable them before booting.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
if the macb's mac is not a valid public mac set a private with "smf" as OUI
as the mac address might be set by the previous bootloader
set a private with "smf" as OUI for asix
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The data caches should be invalided once during startup. This should
also be done when we do not have the MMU enabled in barebox because
the Kernel does not invalidate the caches during start.
To make this sure this patch enables the arm_early_mmu_cache_invalidate
function even if MMU support is disabled. Additionally this patch adds
calls to arm_early_mmu_cache_invalidate in start.c and uncompress.c.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
None of the driver make the difference between STDOUT and STDERR.
So we just need to check if putc or getc are filled in the console_device
save 32 bytes on versatilepb
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we can always found it and not confuse it with a usb stick device
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>