This file originates in Linux. Linux has it under include/linux/
directory since commit dccd2304cc90.
Let's move it to the same place as well in barebox.
This commit was generated by the following commands:
find -name '*.[chS]' | xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:'
git mv include/sizes.h include/linux/
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently, MIPS is the only architecture that needs
include/generated/asm-offsets.h, but we have got ./Kbuild file now.
It is a good reason to move asm-offsets.h rule from arch/mips/Makefile
to ./Kbuild and add dummy asm-offsets.c for the other architectures.
asm-offsets.h would be useful for all the architectures.
This commit does not implement include/generated/bounds.h,
but if necessary, it is easy to implement it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
broken since
commit ed6e965824
Author: Sascha Hauer <s.hauer@pengutronix.de>
resource: Let dev_request_mem_region return an error pointer
Introduce dev_request_mem_region_err_null
only used on platform like at91 where the resource address conflicts
with errno PTR.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
useful to use it for testing on qemu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
since
commit 54bccadddd
Author: Raphaël Poggi <poggi.raph@gmail.com>
mtd: atmel_nand: retrieve ecc_mode from pdata
break most of the non atmel AT91 boards that did not provide a ecc_mode
params in the nand pdata
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Raphaël Poggi <poggi.raph@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Booting a beaglebone black from eMMC is broken since:
commit 0d6392de4a
Author: Sascha Hauer <s.hauer@pengutronix.de>
Date: Thu Jun 5 12:09:07 2014 +0200
ARM: AM335x: Beaglebone: Use stripped down devicetree for MLO
The stripped down device tree does not have the eMMC device node which
the beaglebone black needs for booting. Add this node to the common dts
file, but keep it disabled. It gets enabled later with a call to
am33xx_of_register_bootdevice() when the system is booted from eMMC.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We already have arch/arm/mach-versatile/include/mach/debug_ll.h
but HAS_DEBUG_LL is missed.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- Boot from NOR
- enable UBI
- use PBL
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- Enable multi-image support to generate bootstream, sd-card and 2nd stage
images.
- Handle pin-mux in lowlevel.c only.
- Use fine-tuned memory setup from u-boot.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The EMI pins are documented in the reference manual as using value 0 for both
1.8V and 2.5V. Value 1 is reserved.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- enable multiimage support to generate bootstream, sd-card and 2nd
stage images
- Enable new defaultenv support
- Enable more features
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Freescale MXS SoCs have a multi staged boot process which needs
different images composed out of different binaries. The ROM executes
a so called bootstream which contains multiple executables. The first
one is executed in SRAM and the purpose of this binary is to setup
the internal PMIC and the SDRAM. The second image is usually the
bootloader itself. In case of barebox the bootstream is composed
out of the self extracting barebox image (pblx) and the prepare
stage for setting up the SDRAM.
The bootstream image itself is useful for USB boot, but for booting from
SD cards or NAND a BCB header has to be prepended to the image. In case
of SD boot the image has the .mxssd file extension in barebox.
Since the bootstream images are encrypted they are not suitable for
2nd stage execution. For this purpose the 2nd stage images are generated.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
U-Boot has code to replace the infamous Freescale bootlet code.
This patch adds this for barebox with some changes:
- Separate it more into mx23/mx28 functions instead of mxs functions
with #ifdefs for the actual SoC
- Add mx2x_power_init_battery_input() power entry point for boards
which have a regulated input on the battery pin to supply the board.
- Export more functions to be more flexible when boards need non standard
setup.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is directly taken from the rockbox projects sbloader tool,
just renamed to mxs-usb-loader to avoid confusion with bareboxes
several different image tools.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that we have printf support in the PBL we can use it right
after setup_c(). Add some debug messages to the early PBL code
to make it more clear what is happening there.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
pr_debug can now be used right after setup_c(), so add some debug
messages to the early startup code to make it a bit more clear what
is happening there.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
A lot of the arm build (especially PBL stuff) depends on section
garbage collection to be enabled. If it is disabled a lot of targets fail
to link properly. If module support is enabled garbage collection was
disabled on the premise that we throw away too many function which may be
needed in later modules.
The proper way to keep the functions around for use in modules, which
already works, is to annotate them with EXPORT_SYMBOL.
As module support is still marked as experimental I think it's reasonable
to expect users to make sure all symbols that are used by their modules
are properly annotated.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Only build it at the correct obj or pbl stage where
the entry is needed.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Provide the necessary types and defines used in this header.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This reverts commit 4b17d73c7d, as it is incomplete and partially
broken. ARCH_IMX_EXTERNAL_BOOT_NAND does not depend on MTD, it just uses
some defines from the mtd/nand header, but does not actually depend on MTD
being compiled in.
For the other two cases there is a more complete fix merged with commit
57b584d748 that also enables the needed MTD write support.
Fixes:
(MACH_TX25 && MACH_PCA100 && MACH_PCM038) selects ARCH_IMX_EXTERNAL_BOOT_NAND
which has unmet direct dependencies (ARCH_IMX && MTD)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The corresponding code doesn't use the lr register (neither explicitly
nor implicitly by the bl instruction), so there is no gain in using r2
here.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
A part of the existing comments was incomplete or missleading.
Adding the register name to mcr/mrc instructions helps finding the
corresponding documentation in the manuals.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Architecturally the cache contents are undefined so it might well
contain stale data at reset. So better be save than sorry.
I verifyed that the added instructions are defined for both, ARMv6 and
ARMv7, using the ARM Architecture Reference Manual, ARMv7-A and ARMv7-R
edition (ARM DDI 0406C.c). For the already existing mcr instruction see
the newly added comment.
This patch also unifies handling of ARMv6 and ARMv7, the isb instruction
can also be done on the latter via mcr which simplifies the code a bit.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We do not have a root partition in spi flash any more.
Adapt comment.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adds a command to drop back into the calling EFI process.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows to actually reset the system from barebox
instead of dropping back into the EFI firmware.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current iocsr-config-cyclone5.c is actually board specific, although the
file name suggests otherwise.
As the file was generated for the SoCkit, move it there and add a new one
for the socrates.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Distil common code pattern for Phytec entry functions into a macro and
use it instead. This way a new board derivateve that differs only in device
tree file can be added with just one line.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Distil different startup functions into a generic one, different
behavioral aspects of which can be influenced by its parameters.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some drivers need clk_set_rate. To be able to link with these
drivers enabled provide a clk_set_rate stub.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
CPU_ARM946E is selected by boards, so letting it depend on !MMU
leads to broken dependencies. Let MMU depend on !CPU_ARM946E instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Don't try to attach mac to device if there is no net support selected.
Fixes:
undefined reference to `dev_add_param_mac' in both iim and ocotp drivers.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enable support for the i.MX6sx sabresdb and the KaRo Tx6x.
The sabresdb needs regulator support, so enable this aswell.
Also enable usbserial support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for the Freescale i.MX6sx sabresdb board.
Tested are:
- UART
- The three SD card slots
- USB host
- USB otg (host and device mode)
- FEC (both)
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add some cpu type defines and clock support. The clock support
is very different from other i.MX variants, so it's a separate
file, like done in the kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current algorithm assumes the MAC address starts at a 4 byte
aligned address. Unfortunately this is not always the case. On the
i.MX6sx the MAC Address for the second FEC starts at offset 0x632.
The register space for the fuse map has holes, only the 16 byte
aligned words contain data. This means we have to skip the holes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Pin 0x74 (gpmc_wpn.gpio0_30) is not used on the phyCORE SOM.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Blspec is a consumer of the flexible bootargs mechanism, so it should
depend on it rather than select it.
Fixes:
warning: (BLSPEC && DEFAULT_ENVIRONMENT_GENERIC_NEW) selects FLEXIBLE_BOOTARGS
which has unmet direct dependencies (COMMAND_SUPPORT && CMD_GLOBAL)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Avoids a build failure if the config does not include ULPI support.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This fixes NAND initialization issue which appears occasionally on
some i.MX6 SoCs (particulary was observed on phyCARD-i.MX6 with
i.MX6Solo).
Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There are only a few users of BUILTIN_DTB left, but those should
alsways fill thr name properly. Avoids lots of failures in the
randconfig builds.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It doesn't make sense to allow building in a single DTB into a
multiimage barebox, so we can spare the user this option.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This was only done for some of the boards and while it is ok to build
those boards without regulator support it may potentially yield non-working
barebox binaries. This is clearly not what the user wanted.
Also select the appropriate bus support needed for the MC13xxx.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Old version of imx6_mmdc_add_mem did not use 64-bit arithmetic and
thus was prone to overflow on systems with 4GB of memory. It also did
not take into account the fact that i.MX6 does not support more than
3.8GB of memory and would report incorrect memory size. This commit
fixes both issues.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Setting up the MIPI unit is necessary for proper IPU support,
so set this up here. This is only needed for graphics in barebox,
the Kernel repeats this setup during booting.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for phyBOARD-SUBRA which use a phyFLEX-i.MX6 (pfla02) module.
- i.MX6 SOLO with 512MB RAM
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for phyBOARD-ALCOR which use a phyFLEX-i.MX6 (pfla02) module.
- i.MX6 Quad with 1GB RAM on two banks
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If booted from serial via xmodem, also get barebox.bin per xmodem
For first stage you need the .pblx file instead of MLO.
Add serial boot to am335x_mlo_defconfig introduce some cleanups
by savedefconfig
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ethernet timings are set by the devicetree. They are no longer required in the
board file.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
imx6_bbu_nand_register_handler is dependent on
CONFIG_BAREBOX_UPDATE_IMX6_NAND. Change the protoype definition such
that said function is stubbed-out when CONFIG_BAREBOX_UPDATE_IMX6_NAND
is not defined.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARCH_IMX_EXTERNAL_BOOT_NAND, BAREBOX_UPDATE_IMX_EXTERNAL_NAND and
BAREBOX_UPDATE_IMX6_NAND all enable features that make use of API
provided by MTD subsystem, so to prevent those features breaking the
build when MTD is disabled make them dependent on it.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As reported by Sebastian, we need to enable this explicitly for the
Tx clock on RGMII. While here, let's enable all the other peripherals.
Although this is documented to be required only for Armada XP SoC,
it has been found to be harmless on Armada 370, so we do it unconditionally
to simplify the code.
Reported-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Recently, a fstat function was added to barebox. Redefine it as usual
to avoid problems for the sandbox. This fixes loading files into the
sandbox.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Was accidently preplaced by the Karo-TX 51 string,
restore the previous state.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The compatible changed when we switched to the upstream
DTs, so the initcalls would not be executed on the START-R
board.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is similar to what we do on imx6 and makes sure we
apply the errata workarounds early.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM Cortex A8 errata 709718:
"Load and store operations to shared device memory
regions may not complete in program order"
We implement the recommended workaround in the bootloader
as it must be applied before enabling the MMU for the
first time.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We don't know the name and vendor of the panel and since the
Kernel simple panel driver does not allow videomodes it's
just "unknown,the-display-on-the-garz-fricke-santaro".
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This moves the variable assignments previously done in /env/config-board
to non volatile variables in /env/nv/. This makes the settings adjustable
by the user without editing a file.
Most of the changes are simple conversions which for many boards makes
/env/config-board unnecessary. Some boards had some logic to assign
global.boot.default based on the current bootsource. This has been
moved to /env/init/bootsource. An additional check is added to not
overwrite a nv.boot.default should it exist.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The config option doesn't make any sense anymore
when building a multiimage barebox. With a proper
DT built into the image we don't need the ODMdata
mechanism to find the debug UART anymore.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
They are missing in the upstream DT. Add them
locally for now.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It's the same as our version, so no need to carry it
around any longer.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Almost everything is upstream now, so no need to
keep our private copy of the DT.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We use them to configure the environment location
so it's a good idea to have them available by default.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use a mlo device tree with all bootable devices disabled.
The bootsource is checked in the board file and only the
needed device is enabled and registered.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for registering disabled boot devices from oftree.
Creating a device tree with all bootable devices disabled, makes
it possible to only enable and register the devices needed to
load the next stage bootloader.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i.MX233 in OLinuXino uses LAN9512 for Ethernet connection.
LAN9512 is connected to USB. Execute usb command before bringing
network up.
This patch makes 'ifup eth0' workable.
Signed-off-by: Dmitry Voytik <voytikd@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The KSZ9031 gigabit phy on the PBA-B-01 carrier board needs special settings
for the RGMII skew control register.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
"Silicon revision 1.0 devices only provide the MMC2_DAT7 signal when Mode3 is
selected. Silicon revision 2.0 and newer devices implement another level of
pin multiplexing which provides the original MMC2_DAT7 signal or RMII2_CRS_DV
signal when Mode3 is selected. This new level of of pin multiplexing is
selected with bit zero of the SMA2 register."
See AM335x Sitara Processors Manual.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Update nand bootargs for phyFLEX-AM335x and phyCORE-AM335x
to support modern kernels.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This catches wrong modes:
- request to enable the pull up on a pin that doesn't have one.
- ditto for bit keepers, drive strength and voltage
Additionally only write values for a given pin if the mode has the
corresponding value set.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i.MX23 and i.MX28 iomux mode definitions differ for no good reason.
Compared to the two previous definitions this introduces a few flags
that are not used yet but this changes in the next commit to detect
broken definitions.
Apart from different constants this commit intends to be a no-op. If
there are changes in the register values there is either a bug in this
patch or the used mode is broken (e.g. a pullup value is defined for a
pin that has a bitkeeper).
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sometimes a power domain didn't properly power up,
reading back the command register seems to fix this
by flushing the write.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The sama5d4 xplained ultra board support following features:
- NAND flash support
- SPI flash support
- MMC card support (MCI1)
- LCD display support (with QT1070)
- Ethernet support
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
last_block is a zero-based block number, so the total number of blocks is
last_block + 1
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Boards like phyBOARD-WEGA RDK have an phyCORE-AM335x
connected with no SPI NOR flash. Added dts to support this.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To support different module variants, split the phyCORE dts
in dts and dtsi. Configurable parts which are supported by
barebox are spi nor flash and i2c eeprom.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The phyCORE-AM335x is a SOM that can be connected to different
carrierboards like PCM-953, phyBOARD-WEGA and phyBOARD-MAIA.
It is enough for the bootloader to support the SOM specific
parts and can be so used also on different carrierboards.
Removed carrierboard specific settings like led and the
second ethernet slave.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- Set default bootsource to the $boosource variable
- Pass ip to kernel on all boot options
- mount rootfs rw
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We can't just enable SYS_SUPPORTS_LITTLE_ENDIAN for successful
little-endian qemu-malta barebox build. Some byte swapping-related
macros are missed, e.g.:
arch/mips/mach-malta/pci.c: In function 'pcibios_init':
arch/mips/mach-malta/pci.c:218:28: error: 'GT_PCI0_CMD_MBYTESWAP_BIT'
undeclared (first use in this function)
GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT |
^
This patch adds necessary macros definition.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The clock driver will ungate all clocks anyway during startup, so
manipulating them in the DCD has no effect.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The nitrogen6x have variants with 2GB SDRAM. Add support for them. The
imxcfg files are from U-Boot.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX6DL only supports up to 800MHz RAM timing, so add the corresponding
file from U-Boot and use it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that we have working network support on the Beaver board
it makes sense to enable some network options.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In order to use some devices we first have to power
up their power domain. Add support to do this in a
generic way.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i2c is needed to enable voltage rails that are later
needed by other drivers.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a mvebu_defconfig which enables all mvebu based boards.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Before actually doing something the user should always confirm the
update. Move the question out of the if() block.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Additionally to the MLO update handlers also register the update
handlers for the regular barebox image.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To be able to not only update the MLO in NAND but also the
regular barebox image.
Since this is implemented with help of the corresponding xload
handler this also removes the 'xload' from the Kconfig options
and the filename.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These are necessary for USB support. To make sure they are actually
enabled when a USB capable barebox is started call the clock enable
function during startup also for the full barebox, not only the MLO.
Signed-off-by: Rolf Evers-Fischer <rolf.evers.fischer@delphi.com>
The AM3xxx can boot images containing a Configuration Header
(generated with omap_signGP) or images with GP Header (simple
size/address information in front of raw image). Update the
SPI NOR barebox update handler to detect the GP Header images.
These have 0x65726162 ('bare') at the offset header[10]. Also
automatically swap the endianess for non swapped images so
that the regular non swapped images can also be flashed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We assumed that there is a special image format for SPI. This is not
the case. The AM33xx can boot either images generated with omap_signGP
or raw images which only have the image size and load address in front
of the image. Whether these images are booted from SPI or another
boot medium doesn't matter. The only special thing about SPI is that
the image is in big endian format.
- renames mk-am3xxx-spi-image.c to mk-omap-image.c as the image format
is not only supported by AM3xxx but also by the OMAP SoCs
- removes the option to specify the SoC
- introduces -s to build a big endian image
- detects if an image already is an image generated with omap_signGP
So the behaviour is like this:
raw image -> mk-omap-image -> prepend size/address -> image for SD/MMC
raw image -> mk-omap-image -s -> prepend size/address, big endian swap -> image for SPI
CH image -> mk-omap-image -> nothing, input == output
CH image -> mk-omap-image -s -> big endian swap -> image for SPI
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add Atmel sama5d4ek board support, which include following features:
- NAND flash support
- SPI flash support
- MMC card support (MCI1)
- LCD display support (with QT1070)
- Ethernet support
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that the correct SoC specific memory fixup function is called
we can allow to select multiple SoCs in Kconfig.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
As the sama5d3 is a family member of sama5, so only check sama5
family.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As the PMC base address may be different between each SoC,
so move them to SoC header.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since 93a6c6a808("dts: update to v3.17-rc2") we have a correct gpio
configuration. This results in a double gpio request what receipted in a
error message like this one:
gpiolib: _gpio_request: gpio-25 (phy-reset) status -16
Now with this patch the problem is gone.
Signed-off-by: Silvio Fricke <silvio.fricke@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Only run the fixup when we are actually on the corresponding
SoC.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The initialisation of the memory nodes on mvebu is a bit
compilcated:
pure_initcall(mvebu_memory_fixup_register)
of_register_fixup(mvebu_memory_of_fixup, NULL)
core_initcall(kirkwood_init_soc)
mvebu_set_memory()
core_initcall(of_arm_init)
of_fix_tree()
mvebu_memory_of_fixup()
First a mvebu common of_fixup function is registered, then the SoC
calls mvebu_set_memory which stores the memory base and size in global
variables. Afterwards the of_fixup is executed which fixes the memory
nodes according to the global variables.
Instead register a SoC specific fixup which directly calls mvebu_set_memory
with the memory base and size as arguments:
pure_initcall(kirkwood_register_soc_fixup);
of_register_fixup(kirkwood_init_soc, NULL);
core_initcall(of_arm_init)
of_fix_tree()
kirkwood_init_soc()
mvebu_set_memory(phys_base, phys_size);
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Multi-SoC support for MVEBU will add mbus ranges for all compiled
SoCs. To protect the mbus node of the SoC barebox is executed on
from others ranges, pass machine's compatible to mvebu_mbus_add_range
and check before applying the fixup.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
mvebu has a reset_cpu function per SoC this does not work when multiple
SoCs are selected, so add a common reset_cpu function which calls into
the SoC specific ones.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The Karo TX6X family consists of different i.MX6Q/DL based System-on-Modules.
Add support for the TX6u 801x modules, that have an i.MX6DL SoC.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For now only the Quad 1GB variant is supported.
Tested:
- starting barebox over USB
- writing barebox to NAND with barebox_update
- starting Linux kernel over TFTP
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Remove mmd_write_reg function from board file and use phy_write_mmd_indirect.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add environment node for NAND and SPI-NOR
Move the environment property to the module file.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move the spi partition definition to imx6qdl-phytec-pfla02.dtsi
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>