This patch renames imx_27_boot_save_loc() to imx27_boot_save_loc(), so that all
imx*_boot_save_loc() functions follow the same nameing sheme.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch removes some code leftover from:
a029e32 ARM i.MX: rework bootsource setting
which is now a no-op.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This function gives all functions a common, i.e. void, return value.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enums are in the same way as defines, so write them in uppercase.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The external NAND boot code currently does not handle bad blocks
correctly on 2k NAND flashes. This patch adds a barebox_update
handler for external NAND boot which embeds a Bad block table in
the flashed image. The boot code will skip bad blocks found in
this bad block table then.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX external NAND boot code checks for a bad block every
page, which is wrong. Instead, check for a bad block at the
beginning of each block.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- switch to new environment
- make barebox partitions 512K big
- update defconfig for new env:
- enable menu support
- miitool support
- clk commands
- oftree support
- let/dirname/readlink commands
- enable external nand boot support
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The reset value for the MAX clk gate is 0b10, that is it is turned
on in CPU run mode and off in stop mode. Configure it that way during
startup.
The 0b11 value previously in this field causes some nasty behaviour in
the Linux kernel:
- The i.MX35 has two bits per clock gate which are decoded as follows:
0b00 -> clock off
0b01 -> clock is on in run mode, off in wait/doze
0b10 -> clock is on in run/wait mode, off in doze
0b11 -> clock is always on
The MAX clock is needed by the SoC, yet unused in the Kernel, so the
common clock framework will disable it during late init time. It will
only disable clocks though which it detects as being on. This detection
is made depending on the lower bit of the gate. So with the value of
0b11 the clock framework will detect the clock as turned on, yet unused,
hence it will turn it off and the system locks up.
With the value of 0b10 instead, the clock framework will detect the
clock as being disabled and will not try to turn it off, so the
system works.
The real bug is in the Linux clock framework. However, the value 0f 0b10
seems to be a sane default value, so restore it. This lets Linux work
again and gives time to fix the bug in Linux.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We cannot jump to SDRAM unconditionally in imx*_barebox_boot_nand_external.
When we really boot from NOR flash the binary is not yet copied to SDRAM.
Instead, let the return value of imx_barebox_boot_nand_external() indicate
whether we really boot from NAND and only jump to SDRAM in this case.
Otherwise just continue to the normal SoC specific entry.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Only one of IIM, CCM or ESDCTL device is allowed, so use DEVICE_ID_SINGLE
for these devices.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
PCM038 uses IIM in board code, so select IMX_IIM symbol by default.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides rename MFD-related symbols for using MFD-prefix.
Additionally, sorting mfd/Kconfig and mfd/Makefile records.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX21 has a imx1 gpio type. Change the name accordingly, otherwise
the gpio driver does not probe successfully.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX35 has a imx31 gpio type. Change the name accordingly, otherwise
the gpio driver does not probe successfully.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
reset is confusing with the cpu reset and impossible to grep
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Most i.MX boards can use the imx*_barebox_entry functions. The remaining
(i.MX21, i.MX6) use hardcoded base addresses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i.MX will get SoC specific entry points for barebox. To find the
correct one we have to call these from the SoC specific
imx*_barebox_boot_nand_external functions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Additionally to the generic entry point the i.MX specific ones
calculate the SDRAM size automatically so the boards do not have
to care.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Several i.MX boards setup a temporary stack in their lowlevel code.
Instead of using STACK_BASE use a stack in internal SRAM to get rid
of the STACK_BASE compile time dependency.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pattern for i.MX boards starting in external NAND boot mode is always
the same:
- Check if we are running in NFC address space, if not call
board_init_lowlevel_return()
- copy binary to link address
- execute relocated binary
- call imx_nand_load_image()
Add a common function for this to make the board code easier.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows to register the USB ports for the chipidea driver. For
now the otg/h1 register functions also register the corresponding
USB phys.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
What we had as usb phy1 base address is really usb phy2. Fix the names
and add the missing base address definition for usb phy1.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The imx6_usb_phy1* functions are misnamed. It's usb phy2 that is configured
here, so rename the functions accordingly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On the MX27 based board phycard-i.MX27 the display won't properly
come up.
Before removing imx-regs.h and the code that sets the register
in the i.MX video driver, the PCCR registers were set _after_
the screen start (LSSAR) was set.
This restores that old behaviour and makes the display come up
properly again.
I did not have a chance to test this on any other i.MX27 or i.MX21
hardware though I assume that the "old" order is required there
too.
Signed-off-by: Daniel Mierswa <d.mierswa@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Also put those names solely in the .c file as it's done with
the i.MX27 code.
Signed-off-by: Daniel Mierswa <d.mierswa@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Efika MX Smartbook is a i.MX51 based netbook. This patch adds
nearly full support for it including:
- USB
- SD card slots
- Internal SPI NOR flash
- Internal flash PATA drive
- LEDs
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Register the USB misc devices and provide convenience wrappers to
register the USB ports for i.MX27.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX27/31 have the second chip select enabled by reset default.
This can be considered as a hardware bug, because even boards which
need this settings cannot work out of reset because of the missing
initialization sequence. Detect this reset default setting and disable
this chipselect then to be able to properly detect the SDRAM size.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides a global cleanup barebox Kconfig files. This includes
replacing spaces to tabs, formatting in accordance format, removing
extraneous lines and spaces. No functional changes.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for the Garz+Fricke Vincell board. This has
a i.MX53 Processor with 512MB of DDR3 RAM.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for initializing DDR3 RAMs on the i.MX53 type
SDRAM controller. The code automatically detects size/layout of
the connected RAM, detects the bus width and which chipselects are
populated.
While I believe this code is not 100% generic, it is far too
sophisticated to stay in a single board directory. I'm sure
other boards could make use of this aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pll setup function is exported, so it makes sense to export
the convenience wrappers for specific frequencies aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some boards do not have a DCD table since they initialize everything
in code, so allow to skip it and leave the corresponding pointers
empty.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The code initializing the SDRAM controller is not at the same
place where SDRAM is registered with barebox. To reduce the
risk of registering wrong SDRAM sizes this patch adds a
driver for the ESDCTL which reads back the configured SDRAM
size and registers the memory found with barebox.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In recent reference manuals the plls were renumbered. PLL8 now is
PLL6 and vice versa. Change the code according to the reference
manual to avoid confusion.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ethernet PLL has a fixed frequency of 500MHz. What is adjustable
are additional dividers which we better describe separately.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds lowlevel debug functions for i.MX. As we have a great variety
of different UARTs on i.MX currently no Kconfig support for chosing the
correct one is added. Instead we expect the user to add the correct
define and issue a compiler warning if he hasn't.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Pass the buffer size to the file detection code. This makes sure we do not
read past the buffer. This is especially useful for ext filesystem detection
as the magic is at byte offset 1080. Also introduce a FILE_TYPE_SAFE_BUFSIZE
define which is set to the minimum bufsize the detection code needs to detect
all known filetypes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Update help info, it's slightly out of date, and a grammatical fix.
No functional change.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch sets HPM (Host power mask bit) to bit 16 according to i.MX
Reference Manual. Falsely it was set to bit 8, but this controls pull-up
Impedance.
Reported-by: Michael Burkey <mdburkey@gmail.com>
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The same issue was fixed in the Linux kernel in commit
66ddfc6 (mx35: add a missing comma in a pad definition)
for 2.6.33-rc7.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for an update handler for internal boot. Currently
handled are:
- v1 MMC/SD
- v2 MMC/SD
- v2 NAND
where v1 is found on i.MX25, i.MX35 and i.MX51. v2 is found on i.MX53.
This code intentionally does not use the DCD data compiled into every
i.MX internal boot image. This makes it possible to make a pure second
stage barebox bootable on i.MX internal boot devices later.
This has been tested on the i.MX51 babbage, i.MX53 loco and i.MX53 tx53
board.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The KARO Tx53 board in the revision 8030 has an instable SDRAM
setup. It works as long as the MMU is disabled, but the board
crashes at arbitrary places once the MMU gets enabled. So we
need the PLL setup early. Enable it for pbl.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This redefines the sdram controller registers as offsets to the base
rather than as absolute addresses. All users are fixed to use the
SoC specific base address.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Rather than doing this in the SoC specific code just print
it in imx_set_silicon_revision. This saves some lines of code
and also results in i.MX27 now also having the silicon revision
printed during startup.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This moves the known i.MX bootsource settings to a single file
so that the code can be shared. Also we add a enum for the different
boot sources so that it can be used in C Code and not only on the shell.
The pcm038 board is changed to use it instead of digging in the registers
manually.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On i.MX we enable all necessary clocks during startup of the clock
controller driver, so we do not need the register hacking in the drivers
anymore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- for i.MX1 the register is in the System Control unit, so move
the code to arch/arm/mach-imx/imx1.c
- for the other i.MX the register is in the watchdog unit, so move
the code to drivers/watchdog/imxwd.c
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
of_alias_get_id() returns the number of the gpio bank, so we have
to multiply with 32 to get the gpio base.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- Add a separate header file for the iomux-v1 just like done for
iomux-v3.
- initialize iomux from SoC code so that we do not depend on IMX_GPIO_BASE
anymore.
- define registers as offset to the base rather than absolute addresses
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All i.MX SoCs now use the same imx_silicon_revision() function to get
the revision. Add a separate header file for it and a common function
used on all SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds the device id mechanism to the i.MX fec driver and
uses it to determine the fec version. Also adds devicetree
probing support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- The i.MX1 timer does not have IPG clock as source, so rename
the define accordingly
- for the i.MX31 timer we want to use the per clock, not the ipg
clock.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The old clock support is now unused. Remove it. The former i.MX clko
command is superseeded by generic clock manipulation commands.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To get rid of the register definitions in the SoC header files.
platform_device_id is used to distinguish between gpt types.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
in commit 2bdc9f57a8 the iomux was synced
with the kernel but this leads to some changes in the PAD_CTRL of some
FEC pins leading to a non working FEC on our cpuimx51 board.
This patch set back the PAD_CTRL of the missing pins to the initial
value.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The IMX i2c driver is to be used by SOCs on both the ARM and PPC architetures.
Use a more neutral name for the structure, function names and #define.
The driver name is now "i2c-fsl".
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add a function to take the usbphy1 through its initialization procedure.
The imx6_usb_phy1_disable_oc function is needed at least on the sabrelite,
as the power design is faulty. The state on other imx6 boards is unknown,
therefore it is an extra function call at the moment.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
tested with a m25p128 flash both in nand boot & spi boot.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With pbl support enabled most boards need a pbl-y for their lowlevel
stuff.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The i.MX5 does not have a valid function to get the spi clock. This
patch introduces a function for i.MX6, and moves the bogus spi clock
speed to the speed-imx5*.c. Not nice, but preserves the current status
quo for i.MX5
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This fix a clock inaccuracy in get_time_ns (used by sleep, time, etc).
At i.MX53 power-on GPT clock is typically 55500000 Hz, and it will be used
to calc the clock multiplier. After call imx53_init_lowlevel() GPT clock
will changed (e.g. to 66666666 Hz), but multiplier not. To fix this behavior call
clock_notifier_call_chain() after changing clock in imx53_init_lowlevel().
Signed-off-by: Wjatscheslaw Stoljarski <wjatscheslaw.stoljarski@kiwigrid.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Procedure is missing, so remove its declaration.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Storing the size instead of the resource end in struct resource was
a mistake. 'size' ranges from 0 to UINT[32|64]_MAX + 1 which obviously
leads to problems. 'end' on the other hand will never exceed
UINT[32|64]_MAX. Also this way we can express a iomem region covering
the whole address space.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This change is necessary because valid source argument for the clko command
can be negative.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds support for ConnectCore® i.MX51 board from Digi International.
A separate option includes support for debugging board for this module.
Some code taken from the bootloader U-Boot and patch from Digi.
Functional of Ethernet not tested yet.
barebox 2012.05.0-00316-g4024d9c-dirty #0 Wed Jun 6 13:08:25 MSK 2012
Board: ConnectCore i.MX51
Module Variant: i.MX515@600MHz, PHY, Acceleromter (0x0b)
Module HW Rev : 02
Module Serial : B111156789
mc13xxx-spi@mc13xxx-spi0: Found MC13892 ID: 0x0045d0 [Rev: 2.0a]
NAND device: Manufacturer ID: 0x2c, Chip ID: 0xda (Micron NAND 256MiB 3,3V 8-bit)
Bad block table found at page 131008, version 0x01
Bad block table found at page 130944, version 0x01
nand_read_bbt: Bad block at 0x00ce0000
nand_read_bbt: Bad block at 0x05bc0000
nand_read_bbt: Bad block at 0x0bc40000
ehci@ehci0: USB EHCI 1.00
detected i.MX51 rev 3.0
imx-esdhc@mci0: registered as mci0
imx-esdhc@mci1: registered as mci1
Malloc space: 0x95f00000 -> 0x97efffff (size 32 MB)
Stack space : 0x95ef8000 -> 0x95f00000 (size 32 kB)
envfs: wrong magic on /dev/env0
no valid environment found on /dev/env0. Using default environment
running /env/bin/init...
Hit any key to stop autoboot: 3
barebox@ConnectCore i.MX51:/
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We must check pointer to function rather than result.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently, both SDHC clock source is PLL3. We can raise clock
for SDHC driver by change source from PLL3 to PLL2.
Below, is debug ouputs with old and new settings.
Detection (PLL3):
set clock: wanted: 400000 got: 375000
Operation (PLL3):
set clock: wanted: 25000000 got: 18000000
Operation SD4.0 (PLL3):
set clock: wanted: 52000000 got: 27000000
Detection (PLL2):
set clock: wanted: 400000 got: 399639
Operation (PLL2):
set clock: wanted: 25000000 got: 23750000
Operation SD4.0 (PLL2):
set clock: wanted: 52000000 got: 41562500
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Added support for CompactFlash cards for PCM970 development board via
PCMCIA window.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This switches the pcm038 board to the new environment template and
does the necessary defaultconfig adjustments. Additionally it disables
UBI support as the pcm038 image is getting bigger and bigger and UBI
seems to be the most unused big (in size) feature.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch reflects real naming of SPI by Freescale.
We have two ECSPI channels and one CSPI.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some devices need to be moved to the PCM970 source file later, because
in fact these devices are not installed on the main unit PCM038.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Also definition can be modified in arch/arm/boards/pcm043/lowlevel.c,
but I am not sure is we can call imx_silicon_revision() from
board_init_lowlevel().
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Supported devices:
- nand
- ethernet
- mmc0, mmc1 (on stk5v3 development board)
- led (on stk5v3 development board)
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Marc Kleine-Budde
Sascha Hauer
Alexander Shiyan
Jean-Christophe PLAGNIOL-VILLARD
Hubert Feurstein
George Pontis
Daniel Mierswa
Christian Kapeller
Robert P. J. Day
Christoph Fritz
Uwe Kleine-König
Jan Luebbe
Steffen Trumtrar
Eric Bénard
Renaud Barbier
Marc Reilly
Wjatscheslaw Stoljarski (Slawa)
Juergen Beisert