FUSEs (OTP registers) can be written via /dev/imx-ocotp character device.
For example, writing MAC 12:34:56:78:9A:BC can be performed as
> mw -l -d /dev/imx-ocotp 0x8c 0x00001234
> mw -l -d /dev/imx-ocotp 0x88 0x56789ABC
and reading as
> md -l -s /dev/imx-ocotp 0x88+8
00000088: 56789ABC 00001234
, where 0x88 (0x22*4) and 0x8C (0x23*4) are offsets of MAC OTP registers.
Notice: FUSEs are PROM, so "0" (unprogrammed) bits
can be replaced with "1" (but not vice versa) only once.
Also, for MAC there are convinient parameters:
> ocotp0.permanent_write_enable=1
> ocotp0.mac_addr=12:34:56:78:9A:BC
imx_ocotp 21bc000.ocotp: reloading shadow registers...
imx_ocotp 21bc000.ocotp: reloading shadow registers...
> echo $ocotp0.mac_addr
12:34:56:78:9A:BC
Signed-off-by: Uladzimir Bely <u.bely@sam-solutions.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move the imx6-reg.h include to the imx6-mmdc header.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for Phytec phyCARD-i.MX6.
- 1GB RAM on two banks
- 1GB RAM on one bank
- 2GB RAM on two banks
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this board is produced by Embest/Element 14 and is based on i.MX6 Solo
The following features are tested :
- UART2 (console)
- eMMC
- SDCard
- uSDCard
- Ethernet
- USB Host (through 4 ports hub)
- I2C 1/2/3
- 2 LEDs
Boot on eMMC and through USB loader are tested.
For more informations on this board : http://www.riotboard.org/
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a clk_gate_flags argument to clock gate creation functions
to allow the introduction of new clock gate modifiers.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a basic support for the ARM-based Rockchip SoCs of the
RK3xxx family.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
GENERIC_GPIO is selected automatically by GPIOLIB
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pingrp defines never made it upstream, so roll back the changes
and use the individual pin defines for the Efika sb instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
barebox used to have its own include/dt-bindings with files copied
from the corresponding kernel files. Use upstream dt-bindings directly
instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To reduce the devicetree files for one board with different memory sizes the
memory size can be read back from i.MX6.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When a mtd device can have bad blocks we want to create a
bb device, so do this automatically. This allows us to
drop bb device creation from the environment.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The purpose of envfs_register_partition is to print an error
message when the partition does not exist. Print an error message
from generic code instead and drop this function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Not needed anymore, as barebox sets this up itself now.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We need to reprogram PLL_P at a later time, so
we have to make sure MSELECT is able to operate
correctly when we stop PLL_P.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
fno-jump-tables isn't enough to guard against
gcc switch optimizations that are unsafe to use
in code that runs before relocation.
The switch-tree-conversion opt pass may generate
lookup tables that are placed in the data section
and accessed via absolute adressing, which fails
prior to relocation.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This most likely doesn't fix any real bugs, but it's the
right thing to do and reduces the noise level with static
checkers.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Otherwise SAM A5d35 would be detected as A5d36.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current implementation fakes a memory-mapped I/O device
at 0x3f8 and 0x2f8, then uses platform read/write functions
to do the actual reading and writing. These platform functions
only exist for the x86 platform; better to move the I/O
routines into the driver and have the driver request I/O ports
using request_ioport_region.
Signed-off-by: Michel Stam <michel@reverze.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Otherwise reading or writing to the SPI flash doesn't
work.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Rework the current framework so that I/O mapped I/O resources are
also possible.
Signed-off-by: Michel Stam <michel@reverze.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For a version 1.0 board the rest of loco_late_init should be executed
to completely configure the board.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The board code does a phy reset. This implicitly requests the phy reset
gpio. This gpio is also registered in the devicetree as phy reset gpio,
so the fec driver probe can't request the gpio and bails out with -EBUSY.
Fix this by freeing the phy reset gpio in the board code. While at it use
gpio_request_array for the gpios.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
SAMA5D36 SoC is a sub type of SAMA5D3 which has two Ethernets
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is needed so that the IPU framebuffer scanout cannot be
starved by VPU or GPU activity.
Some boards like the SabreLite and SabreSD seem to set this in
the DCD already, but the documented register reset values do not
contain the necessary settings.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds the IPU, LVDS and HDMI clocks. As these are many, depend
on the IPU driver being compiled in.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
TX_CLK line is approx. 54mm longer than other TX lines which adds
a delay of 0.36ns. RGMII need a delay of min. 1.0ns. This mean we have to add
a delay of 0.64ns. We choose 0.78 to have a little gap. This can be done by
setting GTX pad skew value to 11100
Also add a delay for the RX delay lines, needed for the Duallite variant.
=> Set register 2.8 (RGMII Clock Pad Skew) to 0x039F.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Otherwise it won't get set in a multiimage build.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The virt2real microcontroller, or virturilka,
is a miniature board for creation of WiFi
or internet controllable smart devices.
See http://virt2real.com for details.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This driver is dts-only version of driver from Linux v3.14-rc5.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit adds minimal support for the DaVinci DM365 SoCs
from Texas Instruments.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This macros are used in exported from linux TI DaVinci code.
Also this macros are used in MIPS cache support code.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For memory reaching the end of the address space
phys + bank->size overflows to 0. Fix this by right shifting
phys and bank->size before adding them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sean Cross <xobs@kosagi.com>
- If we have no memory registered in mmu_init() it's a critical bug.
panic in this case.
- If we do not have a ttb when dma_alloc_coherent or remap_range is
called it's also a critical bug. Panic in this case.
- if find_pte is called with an address outside our memory banks dump
the memory banks and the address to give more clue what went wrong.
Also add some hints what might went wrong to the code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To ease DT import from Linux, which is still maintained in-tree, we
separate barebox-specific changes by including the original dts in
a separate DT file. This allows to overlay modifications and keep
clean DT history. Additionally, this patch updates i.MX27 DTS tree.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The commit
ARM: Make ENTRY_FUNCTION more robust
changed the behaviour of the ENTRY_FUNCTION. For the Socrates the call to
__barebox_arm_head() was not removed. Do so now otherwise the Socrates will
not be able to boot barebox.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- enable more commands :
(menu, password, loadb, let, mm, sha*, bootz, of*, memtest)
- enable led and led triggers
- enable sata support
- enable USB chipidea support
- enable USB network drivers
- enable NFS and DNS support
- enable EXT4 support
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
tested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ ata0.probe=1
imx-sata 10000000.sata: port 0: SATA link ok
imx-sata 10000000.sata: port 0: Spinning up device...
imx-sata 10000000.sata: port 0: ok.
ata0: registered /dev/ata0
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- declare the rigth mux for the GPIO used to enable the USB's 5V
- enable USB host controller
tested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ usb -f
USB: scanning bus for devices...
Bus 001 Device 001: ID 0000:0000 EHCI Host Controller
Using index 0 for the new disk
Bus 002 Device 003: ID 0951:1654 DT R500
Bus 002 Device 002: ID 0000:0000 EHCI Host Controller
3 USB Device(s) found
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
I accidently merged the initial data device node which contained
clocks in the sata node which were not compatible to the ones
in the kernel. Fix this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The mx31moboard is used on the marXbot, Eyebot and Footbot robot.
Signed-off-by: Philippe Rétornaz <philippe.retornaz@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We can compile barebox for multiple boards at once, but currently
they all share a single default environment. This patch adds a
defaultenv_append() which boards can call to customize the default
environment during runtime. Each board now generate default environment
snippets using bbenv-y and add them during runtime with defaultenv_append()
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When booting from SD Card we don't want to load an env
from EMMC.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is a squashed commit of the following downstream
commits:
- Set CS0_END in MMDC0_MDASP to 32Gb (4GB)T
- Fix writes to MMDC0_MDSCR
- Enable bank interleaving (BI_ON) and set write
additional latency (WALAT) to 1 cycle in MMDC0_MDMISC
- Set ARCR_DYN_JMP=1 and ARCR_DYN_MAX=15 in MMDC0_MAARCR
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This was broken with commit 2a1f5f802e
"ARM: rename boards to more consistent naming"
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sets up MSELECT to let main CPUs talk to peripheral devices and starts
high performance A9 CPU cluster.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Allows to talk to external PMIC devices to bring up CPU rail.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch gates the clocks to GPU, IPU, and VPU units by default,
significantly reducing the VDDSOC power draw while barebox is running.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
SYSCON3 register is not used in the barebox, so remove driver for
this register entirely.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Most devices relevant for barebox like sd/emmc/network/uarts
work. Devicetree contains several undefined drive strength settings,
these can be fixed once the kernel has sorted this out.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adding minimal support for the UDOO board.
For more information about the board: http://www.udoo.org/
Signed-off-by: Raphael Poggi <poggi.raph@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For proper startup we need to give clocks and IO signals some time to
stabilize. Tegra2 got away without them, but Tegra3 seems to be a bit
pickier.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Lowlevel code runs when not relocated yet, so we have to make extra sure
not to emit jump-tables with absolute adresses when evaluating switch
statements.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For computer modules the naming standard is to have
a single board directory named after the module and
have all the baseboard support beneath it.
Also change the CONFIG name, as we may want to build
all the baseboards at once.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- Make sure the LCDC ipg clock is turned off during startup
- register all LCDC clocks (ahb, ipg, per) and pass them to driver
This is necessary because the LCDC doesn't have an enable bit. It just
starts working once the clocks are turned on. If the registers have
invalid values at that time the controller goes into some error state.
So we have to make sure the clocks are turned off during startup and
only turned on in the driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
tested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ ata0.probe=1
imx-sata 10000000.sata: port 0: SATA link ok
imx-sata 10000000.sata: port 0: Spinning up device...
imx-sata 10000000.sata: port 0: ok.
ata0: registered /dev/ata0
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
tested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ usb -f
USB: scanning bus for devices...
Using index 0 for the new disk
Bus 001 Device 002: ID 0951:1654 DT R500
Bus 001 Device 001: ID 0000:0000 EHCI Host Controller
Bus 002 Device 003: ID 0000:0000 EHCI Host Controller
3 USB Device(s) found
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- declare the rigth mux for the GPIO used to enable the USB's 5V
- enable USB host controller
tested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ usb -f
USB: scanning bus for devices...
Bus 001 Device 001: ID 0000:0000 EHCI Host Controller
Using index 0 for the new disk
Bus 002 Device 003: ID 0951:1654 DT R500
Bus 002 Device 002: ID 0000:0000 EHCI Host Controller
3 USB Device(s) found
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- configure the MC34708 properly so that USB can work
(the sequence is taken from u-boot)
- add the required defines to the mc13xxx include file
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This re-syncs Marvell Dove and Solidrun CuBox DT files with current
files from Linux v3.14. Since barebox specific properties are now
kept separated, we don't need to tweak them anymore.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To ease DT import from Linux, which is still maintained in-tree, we
separate barebox-specific changes by including the original dts in
a separate DT file. This allows to overlay modifications and keep
clean DT history.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This imports the Marvell mbus driver from Linux. The mbus is the
main downstream bus found on all Marvell Orion SoCs. The driver
deals with re-configurable address windows which are currently
parsed from DT. Also enable the driver as default on all MVEBU
SoCs. While at it, also reorder drivers/bus/{Kconfig,Makefile}
alphabetically.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Similar to mount(8) the barebox command mount now supports passing a string
to the file system driver via -o.
This is used in the next commit to let the user specify port numbers for
nfs mounts.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows to load all the lowlevel init code, including the
uncompressor, inside SRAM and not just the bare init part. This is
useful when pbl is used as a first-stage bootloader but is loaded by an
external firmware.
Signed-off-by: David Vincent <freesilicon@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This renames the Freescale and Phytec board directories and defconfig
files to a common naming scheme. The board directories are named
<vendor>-<board> and the defconfig files are named
<vendor>-<board>_defconfig. Also the DataModul realq7 is renamed to its
Marketing Name eDM-QMX6.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some boards need gpio functions very early and also sometimes
is useful to toggle gpios during early code debug. This adds a header
file for setting i.MX gpios early.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Which bootmode is selected has no longer to be chosen by Kconfig. The
boards can decide themselves which bootmode they want to support. This
makes it unnecesary to ask the user which bootmode shall be supported,
so the "Select boot mode" becomes invisible and both support will be
compiled in as needed by the boards. NAND_IMX_BOOT goes away and the
already existing ARCH_IMX_EXTERNAL_BOOT_NAND can now be used for the
boards to depend on external nand boot.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Only one GPT will be used, but with devicetree support we can't predict
which one it is, so we need the clock lookup for all GPTs to ensure
that the timer gets its clock.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If we are running from NFC SRAM and we are passed boarddata
containing a devicetree pointer then it point to an address relative
to the NFC SRAM start. First thing we do is to copy the initial
binary to SDRAM and jump there. The devicetree pointer has to be
adjusted by this offset.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When compiling with multiimage support ld_var(_barebox_image_size) only
contains the length of the PBL image, but not including the appended
compressed data. With this patch the image size is read from the barebox
header instead which contains the correct size, either from the linker
or from the fix_size tool.
This makes the external_nand_boot compatible with multiimage support.
Tested on Phytec phyCARD-i.MX27 with and without PBL.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>