Add the clocks for the IPU on i.MX5. Since these are many only
add them when the driver is enabled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i.MX5 has clock number defines in dt-bindings, use them rather
then manually keeping the clock enums in sync.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX barebox update handlers take an optional dcd table as argument.
This can be used to add the correct dcd data to the image before flashing
it.
This mechanism is quite complicated and largely unused, so remove it. With
this it is only possible to flash the exact image passed to barebox_update,
which is what is mostly done anyway.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some of the barebox specific changes that were added in commit
e0316b4dd7 got lost during the switch to use
upstream dtsi files in commit bb7cf71cff.
Especially the memory size is important since we have two different memory
sizes which have to be handled.
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This isn't much different from the default 1,16V
and I haven't seen this make a difference on any
board, but it seems to be required for some T30 SKUs.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It's not safe to ramp up the CPU clock speed to
1,4 GHz on all T30 SKUs, as this may result in failure
to start the kernel properly. Start CPU at 600 MHz,
which is safe even for the slowest SKUs.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This board wasn't changed properly, as it was merged in the short
timeframe where the signature change waited to be applied. Change
it now to get rid of the compiler warning.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For small systems we would put the zImage at 32KiB after
the start of memory, and put the DT a bit after the uImage.
The kernel will always try to relocate itself and overwrite
the DT.
Try to be more clever at uImage placement to avoid
triggering the kernel relocation.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For small systems we would put the zImage at 8MiB after
the start of memory, and put the DT a bit after the zImage.
When we encounter an image which is bigger than 8MiB
uncompressed, the kernel would try to relocate itself
and overwrite the DT.
Try to be more clever at zImage placement to avoid
triggering the kernel relocation.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If we have two discontinuous memory banks we want to move
the malloc area into the upper bank by default to leave as
much free space in the lower bank, where we have to place
kernel, oftree and initrd.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Not needed anymore, as barebox now accepts FDTs outside
of it's visible DRAM, as long as it's a valid pointer.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Not needed anymore, as barebox now accepts FDTs outside
of it's visible DRAM, as long as it's a valid pointer.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Not needed anymore, as barebox now accepts FDTs outside
of it's visible DRAM, as long as it's a valid pointer.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Mostly to make it clear that boarddata needs to be
something we can dereference.
As this is a pretty invasive change, use the opportunity
to make the signature 64bit safe.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
FUSEs (OTP registers) can be written via /dev/imx-ocotp character device.
For example, writing MAC 12:34:56:78:9A:BC can be performed as
> mw -l -d /dev/imx-ocotp 0x8c 0x00001234
> mw -l -d /dev/imx-ocotp 0x88 0x56789ABC
and reading as
> md -l -s /dev/imx-ocotp 0x88+8
00000088: 56789ABC 00001234
, where 0x88 (0x22*4) and 0x8C (0x23*4) are offsets of MAC OTP registers.
Notice: FUSEs are PROM, so "0" (unprogrammed) bits
can be replaced with "1" (but not vice versa) only once.
Also, for MAC there are convinient parameters:
> ocotp0.permanent_write_enable=1
> ocotp0.mac_addr=12:34:56:78:9A:BC
imx_ocotp 21bc000.ocotp: reloading shadow registers...
imx_ocotp 21bc000.ocotp: reloading shadow registers...
> echo $ocotp0.mac_addr
12:34:56:78:9A:BC
Signed-off-by: Uladzimir Bely <u.bely@sam-solutions.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move the imx6-reg.h include to the imx6-mmdc header.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for Phytec phyCARD-i.MX6.
- 1GB RAM on two banks
- 1GB RAM on one bank
- 2GB RAM on two banks
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this board is produced by Embest/Element 14 and is based on i.MX6 Solo
The following features are tested :
- UART2 (console)
- eMMC
- SDCard
- uSDCard
- Ethernet
- USB Host (through 4 ports hub)
- I2C 1/2/3
- 2 LEDs
Boot on eMMC and through USB loader are tested.
For more informations on this board : http://www.riotboard.org/
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a clk_gate_flags argument to clock gate creation functions
to allow the introduction of new clock gate modifiers.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a basic support for the ARM-based Rockchip SoCs of the
RK3xxx family.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
GENERIC_GPIO is selected automatically by GPIOLIB
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pingrp defines never made it upstream, so roll back the changes
and use the individual pin defines for the Efika sb instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
barebox used to have its own include/dt-bindings with files copied
from the corresponding kernel files. Use upstream dt-bindings directly
instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To reduce the devicetree files for one board with different memory sizes the
memory size can be read back from i.MX6.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When a mtd device can have bad blocks we want to create a
bb device, so do this automatically. This allows us to
drop bb device creation from the environment.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The purpose of envfs_register_partition is to print an error
message when the partition does not exist. Print an error message
from generic code instead and drop this function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Not needed anymore, as barebox sets this up itself now.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We need to reprogram PLL_P at a later time, so
we have to make sure MSELECT is able to operate
correctly when we stop PLL_P.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
fno-jump-tables isn't enough to guard against
gcc switch optimizations that are unsafe to use
in code that runs before relocation.
The switch-tree-conversion opt pass may generate
lookup tables that are placed in the data section
and accessed via absolute adressing, which fails
prior to relocation.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This most likely doesn't fix any real bugs, but it's the
right thing to do and reduces the noise level with static
checkers.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Otherwise SAM A5d35 would be detected as A5d36.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current implementation fakes a memory-mapped I/O device
at 0x3f8 and 0x2f8, then uses platform read/write functions
to do the actual reading and writing. These platform functions
only exist for the x86 platform; better to move the I/O
routines into the driver and have the driver request I/O ports
using request_ioport_region.
Signed-off-by: Michel Stam <michel@reverze.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Otherwise reading or writing to the SPI flash doesn't
work.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Rework the current framework so that I/O mapped I/O resources are
also possible.
Signed-off-by: Michel Stam <michel@reverze.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For a version 1.0 board the rest of loco_late_init should be executed
to completely configure the board.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The board code does a phy reset. This implicitly requests the phy reset
gpio. This gpio is also registered in the devicetree as phy reset gpio,
so the fec driver probe can't request the gpio and bails out with -EBUSY.
Fix this by freeing the phy reset gpio in the board code. While at it use
gpio_request_array for the gpios.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds CBUS UART dts support;
also it adds the necessary macros for DEBUG_LL.
qemu-malta supports three serial interfaces:
* two ports are provided by the FDC37M817
Super I/O; this chip is connected via LPC bus
to Intel 82371EB (PIIX4E) South Bridge;
* the third serial port is provided by
the discrete TI 16C550C (CBUS UART);
this chip is connected via CBUS directly
to the board's GT64120 North Bridge.
See Malta User's Manual (MD00048) for details.
CBUS UART Instructions for use:
1. Enable CONFIG_CONSOLE_ACTIVATE_ALL in .config
(or disable uart0 in dts) and compile barebox;
2. run qemu:
qemu-system-mips -nographic -nodefaults \
-monitor null -M malta -m 256 \
-serial null -serial null -serial stdio \
-bios barebox-flash-image
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add an environment partition and support commands so that the system
configuration can be permanent.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
SAMA5D36 SoC is a sub type of SAMA5D3 which has two Ethernets
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is needed so that the IPU framebuffer scanout cannot be
starved by VPU or GPU activity.
Some boards like the SabreLite and SabreSD seem to set this in
the DCD already, but the documented register reset values do not
contain the necessary settings.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds the IPU, LVDS and HDMI clocks. As these are many, depend
on the IPU driver being compiled in.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This board support code can be used for TP-LINK WR703 too.
TP-LINK WR703 is very similar to TP-LINK MR3020, there are
some non-essential differences:
* WR703 is smaller and cheaper;
* WR703 has only one led, but MR3020 has five leds;
* MR3020 uses mini-USB connector, WR703 uses micro-USB connector.
See https://forum.openwrt.org/viewtopic.php?id=45159 for details.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use the mach-ath79 name for compatibility with linux kernel.
Signed-off-by: Du Huanpeng <u74147@gmail.com>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is based on
commit fa1a406f72
Author: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Date: Sat Nov 9 14:24:18 2013 +0100
ARM: lib: add BAREBOX_CLK_TABLE to linker script
This adds an .oftables section right before .dtb section with
BAREBOX_CLK_TABLE to ARM linker script.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Here is my error log:
CC common/startup.o
In file included from arch/mips/mach-xburst/include/mach/debug_ll.h:25,
from include/debug_ll.h:31,
from common/startup.c:36:
arch/mips/include/asm/debug_ll_ns16550.h: In function 'PUTC_LL':
arch/mips/include/asm/debug_ll_ns16550.h:62: error: 'DEBUG_LL_UART_ADDR' undeclared (first use in this function)
arch/mips/include/asm/debug_ll_ns16550.h:62: error: (Each undeclared identifier is reported only once
arch/mips/include/asm/debug_ll_ns16550.h:62: error: for each function it appears in.)
make[1]: *** [common/startup.o] Error 1
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
TX_CLK line is approx. 54mm longer than other TX lines which adds
a delay of 0.36ns. RGMII need a delay of min. 1.0ns. This mean we have to add
a delay of 0.64ns. We choose 0.78 to have a little gap. This can be done by
setting GTX pad skew value to 11100
Also add a delay for the RX delay lines, needed for the Duallite variant.
=> Set register 2.8 (RGMII Clock Pad Skew) to 0x039F.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
All MIPS board use <vendor>-<model> name template save Ritmix RZX-50.
This commit fixes this inconsistency.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We use dts for serial port initialization,
so we have no need in mach-xburst/serial.c anymore.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Otherwise it won't get set in a multiimage build.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The virt2real microcontroller, or virturilka,
is a miniature board for creation of WiFi
or internet controllable smart devices.
See http://virt2real.com for details.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Kconfig and make files are updated to build the Freescale P1022DS
image.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The eTSEC 2.0 devices found on the 85xx family of SoCs support stashing
buffer descriptors in the L2 cache. This updates the device tree fixup
for these devices to ensure that the stashing related properties used
by Linux are initialised correctly.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for the Freescale P1022DS. Driver support is limited to:
- I2C
- Ethernet
- Serial
- NOR flash
- PIXIS FPGA
System clock configuration is read from the FPGA but has only been
tested using a 133MHz system clock and 100MHz DDR clock.
Boot arguments are defined in the environment to boot over NFS with
a console configured at 115200 bauds.
Enabling branch prediction is moved from board support to the platform
support for all boards as it is a CPU feature.
Some the code is from U-Boot version git-be937b5.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add DDR3 support into the MPC8xxx DDR driver.
To avoid confusion, the function set_ddr_sdram_mode is renamed
set_ddr2_sdram_mode.
Checking for errors is simplified in the DDR2 DIMM parameters
computation to be consistent with DDR3.
This code is derived from the files found in directory drivers/ddr/fsl
from U-Boot version git-be937b5.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add DDR3 SPD verification support for use by the PPC 8xxx DDR driver.
This is based on the equivalent files from U-Boot version git-be937b5.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
CPU, DDR, and LBC definitions are added to support the Freescale P1022.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This driver is dts-only version of driver from Linux v3.14-rc5.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit adds minimal support for the DaVinci DM365 SoCs
from Texas Instruments.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This macros are used in exported from linux TI DaVinci code.
Also this macros are used in MIPS cache support code.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For memory reaching the end of the address space
phys + bank->size overflows to 0. Fix this by right shifting
phys and bank->size before adding them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sean Cross <xobs@kosagi.com>
- If we have no memory registered in mmu_init() it's a critical bug.
panic in this case.
- If we do not have a ttb when dma_alloc_coherent or remap_range is
called it's also a critical bug. Panic in this case.
- if find_pte is called with an address outside our memory banks dump
the memory banks and the address to give more clue what went wrong.
Also add some hints what might went wrong to the code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To ease DT import from Linux, which is still maintained in-tree, we
separate barebox-specific changes by including the original dts in
a separate DT file. This allows to overlay modifications and keep
clean DT history. Additionally, this patch updates i.MX27 DTS tree.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The commit
ARM: Make ENTRY_FUNCTION more robust
changed the behaviour of the ENTRY_FUNCTION. For the Socrates the call to
__barebox_arm_head() was not removed. Do so now otherwise the Socrates will
not be able to boot barebox.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- enable more commands :
(menu, password, loadb, let, mm, sha*, bootz, of*, memtest)
- enable led and led triggers
- enable sata support
- enable USB chipidea support
- enable USB network drivers
- enable NFS and DNS support
- enable EXT4 support
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
tested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ ata0.probe=1
imx-sata 10000000.sata: port 0: SATA link ok
imx-sata 10000000.sata: port 0: Spinning up device...
imx-sata 10000000.sata: port 0: ok.
ata0: registered /dev/ata0
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- declare the rigth mux for the GPIO used to enable the USB's 5V
- enable USB host controller
tested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ usb -f
USB: scanning bus for devices...
Bus 001 Device 001: ID 0000:0000 EHCI Host Controller
Using index 0 for the new disk
Bus 002 Device 003: ID 0951:1654 DT R500
Bus 002 Device 002: ID 0000:0000 EHCI Host Controller
3 USB Device(s) found
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
I accidently merged the initial data device node which contained
clocks in the sata node which were not compatible to the ones
in the kernel. Fix this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The mx31moboard is used on the marXbot, Eyebot and Footbot robot.
Signed-off-by: Philippe Rétornaz <philippe.retornaz@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enable memtest, MMU and iomem support on the P2020RDB and DA923RC.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support to enable caching on a memory region during the memory test.
Tested on P2020RDB and DA923RC.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Memory regions on MPC85xx boards are incorrectly defined leading to
corruption when running memory tests. This patch updates the memory
layout of MPC85xx boards so that critical memory regions can be
correctly reserved during the memory test.
Tested on the P2020RDB and DA923RC.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We can compile barebox for multiple boards at once, but currently
they all share a single default environment. This patch adds a
defaultenv_append() which boards can call to customize the default
environment during runtime. Each board now generate default environment
snippets using bbenv-y and add them during runtime with defaultenv_append()
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When booting from SD Card we don't want to load an env
from EMMC.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is a squashed commit of the following downstream
commits:
- Set CS0_END in MMDC0_MDASP to 32Gb (4GB)T
- Fix writes to MMDC0_MDSCR
- Enable bank interleaving (BI_ON) and set write
additional latency (WALAT) to 1 cycle in MMDC0_MDMISC
- Set ARCR_DYN_JMP=1 and ARCR_DYN_MAX=15 in MMDC0_MAARCR
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This was broken with commit 2a1f5f802e
"ARM: rename boards to more consistent naming"
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sets up MSELECT to let main CPUs talk to peripheral devices and starts
high performance A9 CPU cluster.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Allows to talk to external PMIC devices to bring up CPU rail.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch gates the clocks to GPU, IPU, and VPU units by default,
significantly reducing the VDDSOC power draw while barebox is running.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
SYSCON3 register is not used in the barebox, so remove driver for
this register entirely.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Most devices relevant for barebox like sd/emmc/network/uarts
work. Devicetree contains several undefined drive strength settings,
these can be fixed once the kernel has sorted this out.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adding minimal support for the UDOO board.
For more information about the board: http://www.udoo.org/
Signed-off-by: Raphael Poggi <poggi.raph@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Michael Olbrich
Silvio Fricke
Lucas Stach
Lucas Stach
Beniamino Galvani
Uladzimir Bely
Christian Hemp
Eric Bénard
Alexander Shiyan
Michel Stam
Antony Pavlov
Wjatscheslaw Stoljarski
Renaud Barbier
Bo Shen
Du Huanpeng
Steffen Trumtrar
Philippe Rétornaz
Uwe Kleine-König
Philipp Zabel
张忠山
Raphaël POGGI