The data caches should be invalided once during startup. This should
also be done when we do not have the MMU enabled in barebox because
the Kernel does not invalidate the caches during start.
To make this sure this patch enables the arm_early_mmu_cache_invalidate
function even if MMU support is disabled. Additionally this patch adds
calls to arm_early_mmu_cache_invalidate in start.c and uncompress.c.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we can always found it and not confuse it with a usb stick device
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some of the irq can still be on after a reset or power on as the IP are
powered by the backup power. This could lead to an interrupt dead lock
when the kernel boot. So disable them before booting.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we can specify the devname in the board
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- USB1 is host (tested with a mass storage)
- USB0 is device (quickly tested with DFU)
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
They are currently unused by the board. Enable them anyway to get
compile coverage for the drivers which are otherwise currently unused
in mainline
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
we need to power on the PLL when enabling the USB clock.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this fix :
arch/arm/boards/crystalfontz-cfa10036/cfa10036.c: In function 'cfa10036_devices_init':
arch/arm/boards/crystalfontz-cfa10036/cfa10036.c:123:3: warning: implicit declaration of function 'imx_gpio_mode' [-Wimplicit-function-declaration]cfa10036: fix warning
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- compile in thumb2 mode for a smaller binary
- increase TEXT_BASE to get more memory space
- set malloc size to zero for autodetection
- enable some more commands
- disable MCI_STARTUP, it's no longer needed and saves some time
during boot
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Convert to static inline functions and use lower case letters for function
names. Also, include mach/debug_ll.h when an architecture provides support
for debug_ll, not only when it's actually enabled. This allows architecures
to put some UART initialization code into mach/debug_ll.h which is compiled
out when debug_ll is disabled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Card detect should be rather muxed as gpio then
mmc0_sdcd, as driver does not support this.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add function for indirect access of the mmd registers, based on linux.
phy_read_mmd_indirect
phy_write_mmd_indirect
Also clean some private mmd functions
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Using here now the initialisiation functions in
am33xx_generic.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use now the initialisation functions from am33xx_generic.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There is a lot of duplicate lowlevel code between the
am33xx boards. Move this code to am33xx_generic and
create structs for sdram settings.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Function should use lower case letters. Also give this function
more namespace. While at it include io.h rather than asm/io.h.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
omap_save_bootinfo derefences the argument passed to barebox without
checking it for validity. This breaks 2nd stage booting where r0
is undefined. The best we can do is to check whether the pointer is
somewhere in SRAM and is word aligned. This at least makes sure that
we do not oops. This introduces SoC specific xxx_save_bootinfo variants
since the SRAM addresses/sizes differ between SoCs.
Additionally fix the prototype for omap_save_bootinfo. It uses r0, so
it must be passed this variable.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a omap_set_bootmmc_devname function which can be used
to specify the MMC boot device. In an xload configuration this
is then used to load the next stage. In a regular build this is
used to mount /boot.
Also a device_detect_by_name is added to allow to disable probing
for sd/mmc cards during startup.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
SPI NOR flash can be detected by driver so no platform data
is necessary.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-Added mlo spi NOR copy handler
-This handler will convert the MLO to big endian
-Tested with pcm051 board
Signed-off-by: shravan <shravan.k@phytec.in>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX53 qsb has 1GiB of memory, but it's divided into two non
contigous banks. Remove the wrong memory node since it's overwritten
with the correct values during runtime anyway.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The oscillator frequency varies on different AM33xx boards.
Pass the osc frequency from lowlevel board code
to set the correct one on every board.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Reviewed-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The esdctl devices are currently not in the devicetrees. this means
they are not registered when booting from the devicetree. Move the
device registration from soc_devices_init to soc_init which is called
even with devicetree support so that we get esdctl devices.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
gpiolib user have nothing to define in their machine
specific gpio.h, so do not include it.
The only thing they could define would be ARCH_NR_GPIOS,
but currently no architecture defines it. Should an architecure
feel the need to do it this would be a good opportunity to
get rid of this limitation.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Using __ASM_MACH_IOMUX_H will break once we introduce a
iomux.h which uses exactly this string as double include
protection. Use a SoC specific string instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The mvebu boards use the BOARD make variable for the kwbimage
generation. This only exists in the old way, so move the mvebu
board Makefile entries back to arch/arm/Makefile until they
are converted to multiboard.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With OF clock providers, we can now remove temporary clocks and clock
aliases. Also, non-DT device probing for timer and serial is removed.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds of_clk_providers for core clocks and clock gates found on
Marvell MVEBU SoCs (Armada 370, Armada XP, Dove, and Kirkwood).
It is based on Linux clock providers with clock flags removed, as they
are not used on Barebox.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With multiboard support the compiletime generated BOARDINFO string
gets more and more meaningless. This removes it from Kconfig and
replaces it with a variable that can be set at boardlevel.
Also many boards have a standard setting for the hostname in the
environment. This patch also moves the standard to C code by calling
barebox_set_hostname().
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Calling globalvar_add_simple() and setting a value is more than common.
Add a parameter for the initial value.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Timer node was missing a clocks property to core_clk 0 (tclk). Add it
and while at it, also fix a whitespace issue.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides a global cleanup barebox Kconfig files. This includes
replacing spaces to tabs, formatting in accordance format.
No functional changes.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch placed the flattened devicetree to armlinux_bootparams.
armlinux_bootparams normally is at SDRAM_START + 0x100. The kernels
initial page tables are normally at SDRAM_START + 0x4000, so the
flattened devicetree gets overwritten once it exceeds 0x3f00 bytes
which is quite common.
Revert this patch for now once a better solution can be found
This reverts commit 0c4108f917.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Alexander Shiyan <shc_work@mail.ru>
NAND_WPN is not used on PCM051 so create own NAND
pin mux struct.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Pass the TEXT_BASE to the mk-am35xx-spi-image as the
default address does not fit for AM33xx.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Based on the same commit in the Kernel:
| commit 828b1716459d00b3d57d4309d25a8d1ea241116a
| Author: Shawn Guo <shawn.guo@linaro.org>
| Date: Thu Jul 11 13:58:36 2013 +0800
|
| ARM: dts: imx: share pad macro names between imx6q and imx6dl
|
| The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board
| design can work with either chip plugged into the socket, e.g. sabresd
| and sabreauto boards.
|
| We currently define pin groups in imx6q.dtsi and imx6dl.dtsi
| respectively because the pad macro names are different between two
| chips. This brings a maintenance burden on having the same label point
| to the same pin group defined in two places.
|
| The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs
| pad macro names. Then the pin groups becomes completely common between
| imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the
| long term maintenance of imx6q/dt pin settings becomes easier.
|
| Unfortunately, the change brings some dramatic diff stat, but it's all
| about DTS file, and the ultimate net diff stat is good.
|
| Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We used to pass the DCD data from the boards. This patch allows
to optionally skip passing DCD data. In this case the DCD data
from the flash image is used if present.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Kernel commandline is an important debugging aid when people
ask why their Kernel won't start, so print it unconditionally.
This is done in !dt mode anyway, so also do it with dt.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for the Phytec phyFLEX-i.MX6 board. The phyFLEX-i.MX6
is a system-on-module based on the Freescale i.MX6 SoC. This patch supports
the 1GiB and 2GiB variants on a PBA-B-01 baseboard.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX6 uses the same GPMI NAND controller as i.MX23/28 do. This adds
i.MX6 support to the driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The convenience wrapper also contains the bch resources to
get rid of the hardcoded base in the driver in the next step.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As the apbh dma engine is also found on i.MX6 move the header file
out of MXS specific directories.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MXS specific devices have some common infrastructure in the kernel
known as STMP devices. We have the same in barebox, but with a
mxs_ prefix instead of a stmp_ prefix. As some STMP devices are
also found on i.MX6 move the common infrastructure out of MXS
specific files and use the stmp_ prefix.
This is done in preparation for i.MX6 NAND support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This updates the NAND stuff to Linux-3.11-rc1. It is synchronized
as best as we can get:
- locks removed
- The splitting in different files we had to better support different
features has been dropped. Instead this is now done mostly with the
use of __maybe_unused
Some barebox adjustments are forward ported, like:
- Allow partial page writes
- Optionally allow to erase bad blocks
- check for all_ff before writing a page
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With other changes coming into the tree the binary is getting too big.
Save some space by not registering devices for which no support is available.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of making a pure 32bit write to a read/modify/write
operation with sr32 use writel directly. This saves a few bytes
of binary space.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Successfully boots to console via kwboot. No other functionality yet.
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This drops support for storing the environment in the eMMC,
but the standard bootsource is the SPI NOR flash.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch moves support for MC34708 PMIC into mc13xxx driver.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In some cases, the address of the devicetree, which is obtained
dynamically, may be located in the kernel text area, which leads
to overwrite devicetree by kernel. The patch uses the address for
devicetree, provided by board, if it possible.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ifdefs around the SoC specific boot_nand_external functions
can be removed when all functions go into their own sections so
that the linker can discard the unused functions.
This also adds a #ifdef BROKEN around the i.MX21 code which currently
does not have the imx21_barebox_entry function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of ifdeffing out the correct NFC base address just pass
it to imx_nand_load_image which is called from SoC specific
context anyway.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All boards using the external nand boot code autodetect the
pagesize, so make this nonoptional to make the code simpler.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for the GK802 'QUAD CORE Mini PC', which seems to be loosely
based on the Freescale i.MX6Q HDMI dongle reference design.
It is supposedly identical to the Hiapad Hi802.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
pcm051 uses four MLO NAND partitions, so the default offset
to the barebox can not be used. Pass custom struct.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The size and offset of the barebox partition in nand and spi nor flash
may vary on different boards. Make it possible to pass this information
over boardfile if needed.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ROM loader passes the address of a buffer to the MLO in
register 0. Store this data so we can find the boot source later.
On the same way the bootinformation are passed to the barebox,
then. It has to be enshured that r0 contains always the
buffer or the boot source detection will not work.
Applied this on all OMAPs. This patch is based on work of
Jan Luebbe <jlu@pengutronix.de>.
Compile tested on all OMAP boards.
Tested on pcm049, phyCARD-A-L1 and pcm051.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Tested-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds first stage support for PCM051.
Signed-off-by: Shravan kumar <shravan.k@phytec.in>
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The compiled in dcd images generate an intermediate assembly file. Instead
of generating them as *.S generate them as *.dcd.S to better identify them
as generated files. These are then added to .gitignore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The old way to boot tiny210 was to restart barebox after loading stage2 image.
This turned out to be unstable and stopped working after barebox refactoring.
Now jump to the same position in the loaded code instead of starting it from
the very beginning.
Signed-off-by: Alexey Galakhov <agalakhov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Renamed SPI NOR device from nor0 to m25p0,
to make booting from it possible.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This reverts commit 08c0e206b3.
The external NAND boot code currently uses the _text linker variable
to determine a place for the image. This doesn't work with multi image
support which will link the binary at 0x0. Revert multi image support
for the pcm038 for now until a solution is found.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We just keep one on rm9200ek as I did not yet convert this SoC init to C
struct and still use Macro.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This will allow to drop the config.h and switch to multi board support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
we now use a UBI Volume instead of user_block, kernel and root
the bootloader size is 320KiB not 256KiB
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds clock aliases for spi controllers found on Dove to allow
spi driver to get tclk frequency.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch updates SolidRun CuBox defconfig to more commands also valueable
for debug. Also, all future driver subsystems are enabled to ease driver
development.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This imports dove.dtsi and dove-cubox.dts from Linux kernel with timer
node added.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a DT only driver for the GPIO controller found on Marvell
Orion/MVEBU SoCs (Armada 370/XP, Dove, Kirkwood, MV78x00, Orion5x).
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This converts Armada 370/XP SoC init to register tclk alias
for timer by physbase instead of name.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This converts Kirkwood and Dove SoC init to register tclk alias
for timer by physbase instead of name.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Clocks need to be accessed early for DT support, so move soc_init to
core_initcall instead of postcore_initcall.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For splashscreen support on pcm049, this patch adds omap4 framebuffer
platform data and configures display pd050vl1, g104x1, pm070wl4, pd104slf,
edt_etm0350G0dh6, edt_etm0430G0dh6, edt_etmv570G2dhu and edt_etm0700G0dh6
Also add extra muxing and defconfig
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Only UART clocks are included for now, but the code should cover
other peripherals needs, too.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This removes the existing Tegra CAR driver and replaces it with code
ported from the Linux clock framework.
In the current state only the relevant PLLs are supported, but this is
no functional regression from the existing code.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In order to properly bring up the system PLLs we need a reliable
clocksource. To break the circular dependency between the clocksource
and the CAR driver, get the OSC frequency with a lowlevel function.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is a nearly full-blown config for the v7 i.MX (i.MX51, i.MX53 and
i.MX6).
currently the following images are built:
barebox-imx51-babbage.img
barebox-imx53-loco.img
barebox-imx6-realq7.img
barebox-genesi-efikasb.img
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is necessary because the C name for the flash header matches
the filename. For multiple board support we have to make the name
unique to prevent linker errors.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is necessary because the C name for the flash header matches
the filename. For multiple board support we have to make the name
unique to prevent linker errors.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In principle we could build barebox for multiple i.MX SoCs, so
select the correct SoC from the board selection.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This converts the Freescale i.MX53 loco aka qsb board to
multi image. The image will be named:
barebox-freescale-imx53-loco.img
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This also converts the Phytec phyCORE i.MX27 aka pcm038 to use
image compression. The image will be named
barebox-phytec-phycore-imx27.img
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds the make infrastructure to build multiple SoC or
board specific images from a single barebox binary.
The basic idea is that we no longer have a single pbl, but instead
multiple pbls, one per image if necessary. Each pbl is defined
by its entry function so that each pbl can do exactly what a given
board needs. Additionally the pbls together with a self extracting
barebox binary can be encapsulated in specific image formats.
squashed in build fixes from Lucas Stach for make version >= 3.82:
Split Multimage Makefile rule in explicit and implicit parts
Fixes build with make version >=3.82
Frome the make 3.82 NEWS file:
* WARNING: Backward-incompatibility!
In previous versions of make it was acceptable to list one or more explicit
targets followed by one or more pattern targets in the same rule and it
worked "as expected". However, this was not documented as acceptable and if
you listed any explicit targets AFTER the pattern targets, the entire rule
would be mis-parsed. This release removes this ability completely: make
will generate an error message if you mix explicit and pattern targets in
the same rule.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Lucas Stach <dev@lynxeye.de>
The Marvell boards accidently add a .c instead of a .o file
to the targets. This has the side effect of breaking out of tree
compilation.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
In the upcoming multi image build process we will cat images together.
To find the concatenated image we need to reliably find the end of the
current binary. This adds a dummy section at the end of a pbl binary.
Its only purpose is to mark the end of the image. The multi image
patches will add something to this section so that it doesn't get
discarded by the linker.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The upcoming multi image support will need devicetree binary
blobs even when there is no builtin dtb. Instead of depending
on CONFIG_BUILTIN_DTB depend on CONFIG_OFTREE and let this option
select DTC.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since the pbl linker script can be reused by the upcoming multi image
build process move it to a common place. Also remove ENTRY() from the
linker script and instead add the -e option to the linker. This makes
the entrypoint configurable.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a new function __barebox_arm_head() which defines an
the regular barebox ARM header, but which jumps to the end of
the function so that this can be embedded into another function.
barebox_arm_head() now just uses it and jumps to barebox_arm_reset_vector
just like it did before.
This makes it possible to define board specific entry points.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Addionally to having a builtin DTB provide the possibility for
the board to provide a dtb via boarddata.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This makes cpu_is_* functions when necessary for upcoming multisoc
support. When only one SoC type is compiled in cpu_is_* still expand
to static values.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds OMAP machine dependent framebuffer code so that
board files can make use of driver omap-fb.
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
config.h is automatically generated if not existing, so remove
the empty files and files which only have unused defines.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some boards use function names locally which we introduce as
global functions in the next patch. Rename them to avoid
'static declaration follows non-static declaration' errors.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
commit d7a913469c breaks boot source detection
for pcm049. The tracing vectors shows all tested boot sources, so order is
important. By not returning but overwriting src we effectively reversed the
order if more than one flag is set.
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Don't set SET0 voltage, because it acts as boot voltage for OPP boot.
Take care that the kernel doesn't drive vset gpio to low. This may
happen while reseting the gpio module at initialization, look for
HWMOD_INIT_NO_RESET.
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch removes the call of the cpu_is_* functions completely
and uses id_tables instead.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Added device register functions and cpu_is_am33xx()
function.
Adapted the i2c-omap driver. AM335x has a lower
clock rate and the timeout of polling the isr function
had to be increased.
Based on a patch from Shravan Kumar <shravan.k@phytec.in>.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With of_get_child_by_name from Linux API, we can now convert and remove
of_find_child_by_name.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This patch converts users of of_tree_for_each_node to recently added
for_eacg_compatible_node helper. Also of_tree_for_each_node is removed
from public OF API.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Barebox of_find_node_by_path requires a node to be passed as start node
to start searching. Linux OF API does not pass this node and no current
user of it in barebox is passing anything else than the root node.
Therefore, we rename current function to of_find_node_by_path_from and
introduce a Linux OF API compatible of_find_node_by_path that always
passes the current root_node. Also, all current users of that function
are updated to reflect the API change.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some boards have board specific special clock setups. These are now
done in the SoC specific clock drivers.
It is assumed that most board specific clock setup is done based on
copy/paste from U-Boot. The generalized clock setup differs from
some boards:
- ioclk are adjusted to 480MHz
- ssp clocks are adjusted to 96MHz
- enet out clock is enabled
Some boards adjusted the ioclk to 320MHz and the ssp clock to 160MHz.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MXS needs some special MXS specific clock types:
- pll
- ref (fractional divider)
- busy divider (divider with additional busy bit to poll on a rate change)
- lcdif (Combined clock out of a fractional divider, a divider and a gate.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For OMAP4460 omap4_scale_vcores must set the voltage according to mpu freq.
OPP100 700MHz 1210mV
OPPTB 920MHz 1320mV
OPPNT 1200MHz 1380mV
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This moves the CCM drivers to core_initcall since this has no dependencies.
This way we can be sure that the clock for the clocksource is available in
at postcore_initcall time.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The same value as used in Mainline and Freescale U-Boot. This might
increase the stability of i.MX51 boards. The 5:1 ratio we have in barebox
probably goes back to copy/paste from the i.MX53 code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adjusting the PLLs when MMU/caching is already enabled seems to be
unstable on the Smartbook, so do it during early init.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
imx_silicon_revision() can't be used from early init context, so
use imx51_silicon_revision() instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The IROM is located at physical address 0x0, so reading the
silicon revision from it leads to a NULL pointer dereference
if done too late when the MMU is already enabled. Use the IIM
instead which is also done in the Kernel. This limits the silicon
revisions to 2.0 and 3.0, but I assume the earlier versions are
not seen in the wild anyway.
This also moves the call to imx_set_silicon_revision() out of
imx51_silicon_revision() so that imx51_silicon_revision() can be called
in early init context.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Kernel does not have pinctrl driver for i.MX27 yet. When we using DT,
this cause to unable setup pins to desired function. This patch adds
a setup for MC13783 IRQ pin to avoid this issue.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This settings taken from original DIGI U-boot source code.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without this patch the chipidea driver reports 'No supported role'
during runtime.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Patch will help to develop user devices connected to module, so
user can operate GPIOs in barebox console.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
