hang() only outputs 'reset the board' whereas panic
can be passed a string which we can use to output
some more information what is happening.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Otherwise the kernel would not register the nand partitions.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Extend DCD table and low level init routines. Add barebox SDRAM
device. Also, fix the memory size for bank 0 to 128MB. It was
accidently changed to 124MB here:
commit f928efa818
Author: Sascha Hauer <s.hauer@pengutronix.de>
Date: Tue Jul 19 09:58:32 2011 +0200
add a add_mem_device function
Add a helper function for boards to register their memory
devices. This makes the board code smaller and also helps
getting rid of map_base and struct memory_platform_data.
And switch all of the memory to it
Signed-off-by: Roman Fietze <roman.fietze@telemotive.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this allow to check we do not exceed the size of the SRAM as example
introduce BAREBOX_MAX_BARE_INIT_SIZE the maximum size of bare_init
this will allow your bare_init will fit in SRAM as example
ARCH can overwrite it via ARCH_BAREBOX_MAX_BARE_INIT_SIZE
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adding overlay support for phyCORE-i.MX35.
Also move the TEXT_BASE to leave enough space for the overlay image
at the end of the RAM.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adding overlay support for i.MX3 sdc.
Foreground channel only works when background is also enabled.
The foreground video mode is always the same as the background.
Also added alpha command to set the alpha value of the foreground.
Tested on a phyCORE-i.MX35.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Added num_modes to all imx_ipu_fb_platform_data structs.
Removed defines for pcm043 to choose display.
We may switch this during runtime now.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Make support of multiple video modes possible for i.MX3 boards.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
board_init was moved to pure_initcall. broken since:
commit 0adce7ec68
Author: Sascha Hauer <s.hauer@pengutronix.de>
Date: Sun Jan 15 21:11:17 2012 +0100
ARM omap3: move board_init to pure_initcall
board_init initializes the mux and sdram. For both there is no
need to configure this so early. Move the code to a pure_initcall
and remove the surrounding unneeded code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Juergen Kilb <J.Kilb@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
since commit 494a12f703
platform lowlevel init was moved to mach-omap.
Signed-off-by: Juergen Kilb <J.Kilb@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
since commit ae2ac15105
a_init was renamed to omap3_core_init and called from board code.
Signed-off-by: Juergen Kilb <J.Kilb@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
board_init is now called omap3_board_init. broken since:
commit 494a12f703
Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Date: Sat Jan 14 15:51:05 2012 +0100
omap3: move platform lowlevel init to mach-omap
this will allow to switch omap3 to standard organisation
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This function consists of only inline asm statements, so
use assembly in the first place. Also makes sure that the
function is compiled in arm mode.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>
No need to do this so early. We can't print anything right
now anyway, so there is no need to setup vectors.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>
There is no need to call a_init before relocation, so rename
the function to omap3_core_init and call it from board code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>
board_init initializes the mux and sdram. For both there is no
need to configure this so early. Move the code to a pure_initcall
and remove the surrounding unneeded code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>
Setting up the clocks does not work when the stack is in SDRAM.
Moving the stack to SRAM allows us to do the lowlevel clock setup
later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>
The X-loader startup relocates to SRAM anyway, so there
is no need to be runnable from flash for the clock code.
This config is disabled in all defconfigs anyway, so remove
it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>
this will allow to create it's own env/config
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will allow to create it's own env/config
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will allow to create it's own env/config
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will allow to switch omap3 to standard organisation
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
in commit commit f60f6c58e
atmel_mci: check for device id we use to address the right slot
the driver use the dev_id to detect the slot which is wrong on 9263 as we have
2 devices with 2 slots
use slot_b paramter to specify the slot as done in linux
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will allow to configure the nand as example
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When CONFIG_OMAP_BUILD_IFT is selected, the
target image name was set to "barebox.bin.ift".
This file must be renamed "MLO" before it can
be used on the SD card.
Make this as default behavior.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enable the flag HAVE_NOSHELL to allow first stage
bootloader to be built for this board.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The base address passed for device "omap-hsmmc" was
incorrectly passed as OMAP_I2C1_BASE and the base
address for device "i2c-omap" was hardcoded to
0x4809C000 which, in fact, refers to OMAP_MMC1_BASE.
Similarly, in call to add_usb_ehci_device(), addition
is not required if right base address is used.
In fact, 0x48064700 (used as base in the addition)
falls in the OHCI Address space.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The config option CONFIG_GPMC is renamed to
CONFIG_OMAP_GPMC as result of this commit:
819f416b86
Still, sources continue to use CONFIG_GPMC.
Fix it.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use ds3 for heartbeat and ds5 for dfu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
on 9269 and 9g20 the sram are mirrored at then of the bank so we can join them
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without num_modes the imx fb driver won't work. Specify this
in the boards and also bail out in the driver when num_modes
is unspecified.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Using SSP1 since this is the default configuration.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this was introduced in "6b3e01a arm: eukrea: Fix compilation warning"
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
enable serial and dfu at the same time
senario if the usb device is plugged and the BP is not pressed at boot time
during 5s the usbserial will be enable
disable zlib support to fit in the 256K
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The lowlevel init function was a 1:1 copy from the babbage
baord, so it should be safe to switch to the generic C
lowlevel init.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Eric Benard <eric@eukrea.com>
Reimplement the code from lowlevel.S in C. It is run
from SDRAM anyway, so we can safely do this initialization
in a regular barebox environment instead in Assembly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- move code which can be shared between i.MX53 and i.MX51
to a common file
- rename mx53_init_lowlevel to imx53_init_lowlevel
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
a) use the more CPU specific S3C* macro names
b) move the register description out of the way, as more recent CPUs using a
different layout and more features
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Keep common code in the MACH instead of re-inventing it in each platform.
Also use S3C* macros for all memory related register.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The UART is one of the units which differs only slightly inside the S3C family.
Prepare this driver to share it with more recent CPUs.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
After separation and after all S3C macros are now present, change the driver
to be more generic for future additions.
The timer registers in the S3C24XX family are only 16 bit wide. But these
registers can be read and written in a 32 bit manner. This is important to share
code with more recent CPUs which comes with 32 bit registers.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Most members of the S3Cxxxx family share similar timer units. But they are
not really register compatible. To reflect this, use a separate name space for
the S3C family.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch just move the clocksource functions out of the generic.c source file
to handle it on a per CPU base later on.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There are major differences in the clock tree of the S3C24xx family and the
more recent CPUs of the S3C family. Keep the S3C24XX clock routines separate to
avoid an ifdef hell. But also use generic function names to be able to
share drivers among the S3C family.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This LCD driver is for the LCD controller in the S3C2410/S3C2440 CPUs only.
Change its name to reflect its usage and free the way to add LCD controller
drivers for more recent Samsung CPUs.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The aready existing NAND controller driver in Barebox is for the S3C24XX family
only. Change the name of the file to reflect this fact (and free the way to add
more recent Samsung NAND controllers)
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Start with renaming files to share them in the S3C CPU family,
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The S3Cxxxx family consists of ARMv4, ARMv5 and ARMv6 types of CPU cores. The
S3C24xx sub family is only one of it. To be able to handle all CPUs in one mach
directory, use a more generic name for it.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds basic support for the mx28-evk board. Debug UART, MMC and FEC
have been successfully used.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Recent gcc generates code with unaligned access when architecture
supports it. Setting A bit unconditionally causes data-aborts on such
code rendering barebox unusable.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When executing 'bl' in inline assembler, the 'lr' register must be
marked as clobbered too.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
detect it at boot time
if the user button is pressed 5s and the vbus is 1 start the dfu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
drop irq id and rebase instead of of offset
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this device controller is present on rm9200/9260/9g20/9261/9g10/9263
the 9g45 use an other IP
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Support the setup of the mmc voltage, when booting OMAP4 with twl6030
from nand.
Signed-off-by: Alexander Aring <a.aring@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Added i2c support for omap4. Tested on pcm049.
Driver based on linux kernel implementation.
Also added a shift to access 16-bit registers
to make support for OMAP730/850 possible.
If accessing a non existing slave the bus will go into arbitration mode.
It's unable to recover from it.
Signed-off-by: Alexander Aring <a.aring@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add a function to remap an IO range into a virtual addresses
range. This is particulary usefull for the few devices
mapped at physical address 0, as the MTD boot devices.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The icache command is unused. Instead of adding it to compilation
again, remove it as the cpuinfo command provides the same information.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
configure BP4 and BP3
use BP4 to start DFU mode at boot
if BP4 is pressed at boot time and maintain at least 5s the dfu is started
otherwise we boot normaly
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
by default boot from nand with the bootstrap as first stage
update the smc config for 9g20-ek
switch to defaultenv
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that we have a bootm command which boots everything we can
simplify the defaultenvironment. We can call bootm on every
image type and can remove the kernelimage_type variables.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This switches the bootm code to the new uimage code. Also
bootm can now handle other types of images than uImages.
Currently the only architecture making use of this is
arm which allows to boot zImages, raw images and barebox
images.
I intended to make a more bisectable series from this but
I failed becuase there are many dependencies and no matter
how I tried the patches grew bigger and and bigger. So I
decided to put this all in a single patch.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
whoever calls this function is not necessarily aware of a struct
image_data, so remove the dependency from the function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Support for the old DM9000E device is now part of the new dm9k.c driver. So,
remove the old driver source and switch all users to the new driver.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
on at91sam9 you need to shutdown the sdram/ddr controler before reseting
when you boot from nand
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Newer pcm038 are populated with a PC28F256P30BFE NOR-Flash.
This flash requires different CS values.
The values also work with older NOR-Flashes.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add all available video modes to the framebuffer. devinfo fb0
shows the available modes. We can select a mode now.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
a temporary setting was inserted in the default env by error
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
without this, the pins seems to be opendrain and thus the LCD signals
are not properly driven leading to wrong colors on the screen.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add the platform data for MMC/SD card host on the PXA SoCs.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add mmc clock frequency reader. Easy as MMC host controller
is constant, while the clock between host and card is
settable.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adapt mainline kernel pxa27x_udc driver to barebox :
- remove function header comments as they are in mainline
- test it with serial gadget
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The core support was brought by Marc and Sascha.
The cache choice was fixed by Luotao Fu.
Some gpio and devices addons were provided by Robert.
Signed-off-by: Luotao Fu <l.fu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Barebox cannot boot the recent mainline Linux kernels for the
i.MX21ADS board anymore when using TFTP, because the heap is too
small.
This is solved by increasing the heapsize to 5Mbyte.
Signed-off-by: Jaccon Bastiaansen <jaccon.bastiaansen@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All handlers used to just relocate the image without any checks, so
we are doomed if we write outside of SDRAM or will overwrite ourselves.
Move the relocation up to the generic part where we have a chance
of catching these issues.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that the arch_number and system_rev variables can be set from
the environment we don't need the old bootm command line switch
mechanism anymore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arch_number is currently exported to the environment but not read back
on boot time which is rather confusing. system_rev and system_serial
are not exported to the environment but can be set in board specific
code.
This patch exports all these variables to the environment and reads them
back on boot time. All variables get a armlinux_ prefix, so the
arch_number environment variable gets renamed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We never had interrupt support in barebox and we have no plans to
add interrupt support. Even if we do I doubt the current fragments
of irq support are helpful, so remove them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Rename create_section into create_sections, as the function
is used to create multiple sections, and in particular it
creates the 4096 sections of 1MBytes to have a 1:1 flat
mapping of the 4GBytes address space.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These symbols where defined for the A9M2440 platform. Rename them to the
platform they now belong to.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
nand.c issues a warning when imx_nand_set_layout is
empty. We don't need this function on i.MX53, so
silence the warning.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The S3C2440 CPU comes with an internal OHCI the generic part of
Barebox already supports. Just add the missing part.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently, there are multiple definitions of run_shell()
for each board that can be build in "xload" configuration.
Now there is only one function used by all boards.
The functions defined in xload.c are used only when "xload"
configuration used; but it gets compiled unconditionally.
This has been fixed as well.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If the user has parsed a tree, we start Linux using the
device tree, otherwise we use the traditional ATAG
mechanism.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When building sandbox with ccache, one would hit warnings such as:
warning: 'struct mmsghdr' declared inside parameter list
on random files; a way to reproduce this issue is to build a simple
file doing just:
#include <sys/socket.h>
int main(void) {
return 0;
}
gcc -Wall -P -c -o foo foo.c
But actually the -P flag is only useful when generating non-C files,
such as linker scripts in the case of barebox. Removing the -P flag
from all the gcc invocations, except when generating .lds files makes
the warning go away. It turns out that this is what
linux/scripts/Makefile.build also does nowadays.
Signed-off-by: Loïc Minier <loic.minier@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Running the 'bootz' command always fails with
could not read <some file>
due to wrong usage of pointers and structures. This is the second try to fix
the 'bootz' command. At least on my target it is now be able again to load a
kernel without any error.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Running the 'bootz' command always fails with
could not read <some file>
due to it loads only a size of a pointer, instead of the size of the expected
header structure.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Contrary to other Atmel boards, the AT91SAM9M10G45EK board file only
describes the case where NAND is used as the storage for Barebox and
its environment. Therefore, it makes sense to enable the Atmel NAND
driver in the default configuration for this board.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The environment partition was overlapping the Barebox partition in
those three Atmel boards. Saving the environment resulted in the
Barebox being overwritten.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We switched to resources recently and the nand controller
of the i.MX53 needs two of them, so fix the helper in the
same way as the i.MX51
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds lowlevel (AIPS, PLL, L2) initialization for i.MX53 boards.
This is a direct transcription of Freescales U-Boot assembler code
with the exception that we initialize PLL1 with 1000MHz and assume
that all necessary voltages are already adjusted when we arrive here.
It must be explicitely called from the boards so a board is free to
do it's own initialization. However, boards should use this code
and make it more configurable if necessary.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fixes alignment for the "System Type" menu entry.
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
tested on imx53 loco board with a Multi uImage file
generate like this
mkimage -A arm -O linux -T multi -C none -a 0x70008000 -e 0x70008000 -n Linux-2.6.35.3-00745-gce4c61a-dirty -d zImage:rootfs.cpio.lzma uImage.Multi
and boot via bootm
bootm -r @1 -L 0x72000000 /dev/ram0.kernel
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This fixes the following compile errors
arch/arm/mach-at91/at91sam9g45.c:185:3: error: 'ohci_clk' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9g45.c:186:3: error: 'tcb1_clk' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9g45_devices.c: In function 'at91_add_device_mci':
arch/arm/mach-at91/at91sam9g45_devices.c:258:2: warning: implicit declaration of function 'at91_clock_associate'
[...]
arch/arm/mach-at91/built-in.o: In function `at91_add_device_mci':
sam9_smc.c:(.text.at91_add_device_mci+0x1d0): undefined reference to `at91_clock_associate'
arch/arm/mach-at91/at91sam9260_devices.c: In function 'at91_add_device_mci':
arch/arm/mach-at91/at91sam9260_devices.c:251:2: warning: implicit declaration of function 'at91_clock_associate'
which were introduced in commit:
"at91: swtich to clkdev" (ae19fe26cc)
Signed-off-by: Hubert Feurstein <h.feurstein@gmail.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This brings consistency to the way variables are named and used
according to the Freescale documentation. Also, since user is
supplying row indicies, and not offsets, it's reasonable to amend the
error message accordingly.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds additional Kconfig help to clarify the way to use barebox
for eFuses handling.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
By doing this we can remove the ptes field in struct arm_memory
which won't be present in a generic memory bank structure anymore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To allow for some generic io accessors introduce io.h and use
this instead of asm/io.h throughout the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The nand controller on i.MX51/53 uses two base addresses. Instead
of hardcode the second address use the new shiny resources two specify
it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Based on the Linux driver. Tested with m25p80 with CS in GPIO mode.
Clock setting support is ad-hoc as the corresponding mach is not using
the generic clock infrastructure.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This fixes the following compile errors
arch/arm/mach-at91/at91sam9g45.c:185:3: error: 'ohci_clk' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9g45.c:186:3: error: 'tcb1_clk' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9g45_devices.c: In function 'at91_add_device_mci':
arch/arm/mach-at91/at91sam9g45_devices.c:258:2: warning: implicit declaration of function 'at91_clock_associate'
[...]
arch/arm/mach-at91/built-in.o: In function `at91_add_device_mci':
sam9_smc.c:(.text.at91_add_device_mci+0x1d0): undefined reference to `at91_clock_associate'
arch/arm/mach-at91/at91sam9260_devices.c: In function 'at91_add_device_mci':
arch/arm/mach-at91/at91sam9260_devices.c:251:2: warning: implicit declaration of function 'at91_clock_associate'
which were introduced in commit:
"at91: swtich to clkdev" (ae19fe26cc)
Signed-off-by: Hubert Feurstein <h.feurstein@gmail.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
from linux
commit 8251544f9e28058e54c4f35b7cd13b0d191d7555
Author: Ryan Mallon <ryan@bluewatersys.com>
The uhpck clock should be divided from the utmi clock, not its parent
(main). This change is mostly cosmetic as the uhpck rate value is not
used anywhere except for the debugfs clock output.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we can dynamise the boot depending on the machine
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit c71a77ab8 (ns16550: switch to resource) has introduced generic
read/write access to 16550 register and a 'shift' parameter to allign
register index to physicall registers.
The correct 'shift' value was missing in all omap based boards.
Corrected this to 2 which has fixed the problem.
Tested on a PCM-049 phyCORE-OMAP4 board.
Signed-off-by: Juergen Kilb <J.Kilb@phytec.de>
Tested-by: Jan Weitzel <J.Weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This helper function can be used for automatic
SDDR configuration based on register settings
made by a previously first stage bootloader
i.e. x-loader.
Signed-off-by: Juergen Kilb <J.Kilb@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add platform data to specify maximum frequency of hsmmc interface
which can be restricted due to external level shifters.
Signed-off-by: Juergen Kilb <J.Kilb@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
commit 7d25a0552dd3a4b65412ae1cbf8f9ca8a88b5d27
Author: Juergen Beisert <jbe@pengutronix.de>
Date: Thu Nov 25 17:49:11 2010 +0100
Keep frequency multiplier enabled to be able to do a warmstart
The wachtdog's reset does only reset the ARM core, not the whole silicon.
But the PLLs seems to do some strange things: It seems they switch back to
the low frequency reference when the watchdog barks. But in the case the
frequency multiplier is off (not used due to 26 MHz reference usage) the
machine stops, because the PLLs are stopping due to the lack of a reference
frequency. As the power on reset will set the FPM_EN bit again, a power cycle
brings the machine back to life.
By keeping the frequency multiplier enabled, also a warmstart triggered by the
watchdog can restart the machine now.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
According to the datasheet, PUE is not effective without PKE set.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Set new CS0 values for new NOR-Flashes (28F256P33BF).
These values also work with older flashes (28F256P33B).
Also removed unnecessary setup of CSO in the core_init call.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Updated mx53 ddr3 script in order to align with the latest Freescale version from July 8, 2011:
-change ESDREF[REF_SEL]=01 (for 32KHz), from incorrect setting of 00 (64KHz)
-change DDR3 MR0 write to "setmem /32 0x63fd901c = 0x052080b0" from "0x092080b0".
This changes write recovery from 8 clocks to 6 clocks(in line with ESDCFG1[tWR])
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These images have to be located in the first 128MB of SDRAM, so
use the following strategy:
- first try to map the image. If the pointer is within the first
128MB of sdram everything is fine.
- if we can't map the image, check for SDRAM being smaller than
128MB we can use malloc for allocating space for the image.
- As a last fallback we simply put the image to 8MB into SDRAM.
This is not very clean. We try our best by checking that we
won't overwrite the malloc space.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some older pcm043 only work correct when cpu frequency is set up
to 399MHz. All modules with revision >= 1315.4 are equipped
with a i.MX35 TO2.1 and do run with 532MHz.
Check the silicon revision and set up the frequency accordingly.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that env_push_context is in a coredevice_initcall
we can initialize barebox_loc earlier so that we can
use it inside later initcalls.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer <s.hauer@pengutronix.de> wrote ..
> On Thu, Aug 11, 2011 at 02:37:05PM +0400, Alexander Shiyan wrote:
> > Hello.
> >
> > Please review and apply this simple patch.
...
> Please remove the #ifdef CONFIG_I2C
OK.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as we need to register it before the device
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as we need to register it before the device
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will also fix the clock support as we now switch to allocated generic
device
as we can need to associate the clock and the device but the driver is probe
before the association
we also change the atmel serial name to "atmel_usart" to simplify sharing with
linux
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- Don't call panic with "resetting CPU...". Depending on the
configuration the system might also hang.
- panic does not return, so no need to call reset_cpu afterwards
- bundle show_regs and panic into a seperate functions to not have
to call both functions from each exception handler
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The exception vector at 0x14 is not used on arm, so no need
to bind this address to a exception handler. Remove the
corresponding code
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In barebox we used 1MiB sections to map our SDRAM cachable. This
has the drawback that we have to map our sdram twice: cached for
normal sdram and uncached for DMA operations. As address space gets
sparse on newer systems we are sometines unable to find a suitably
big enough area for the dma coherent space.
This patch changes the MMU code to use second level page tables.
With it we can implement dma_alloc_coherent as normal malloc, we
just have to remap the allocated area uncached afterwards and map
it cached again after free().
This makes arm_create_section(), setup_dma_coherent() and mmu_enable()
noops.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The new MMU setup will need SDRAM base addresses and sizes.
For this reason convert the MMU enabled ARM boards:
- move mem setup to mem_initcall. This is early but
still makes sure that we already have the console available
- move MMU setup in this initcall temporary as after the mmu_init will generic
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
We want to use the memory banks later in the MMU which is
independent of Linux, so move this to a location which is
always compiled.
Also, make the memory bank list global and add an iterator
for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use generic read/write depending on the memory size
if no reg_read/write defined
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
...and update all users. The header file can be used on mx51 and mx53.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The register based fuse readout is not available on i.MX27/31
SoCs, so make explicit sensing the default.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Do not depend on the specific SoCs for the IIM module, but
instead exclude the one that don't have this unit.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The IIM module uses two drivers, one for the general IIM
module and one for the individual banks.
This patch turns this into a single driver to ease registration
of the resources. This changes the user visible behaviour in
the way that the explicit_sense_enable and permanent_write_enable
device parameters are no longer bank specific but for the
whole device. Also, the IIM module supports a maximum of
8 fuse banks, with these patch all of them are registered, even
if they are not present in a SoC.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
pass the hccr and hcor register base via resource
instroduce add_generic_usb_echi_device with hccr = base + 0x100 and
hcor = base + 0x140
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Add a helper function for boards to register their memory
devices. This makes the board code smaller and also helps
getting rid of map_base and struct memory_platform_data.
And switch all of the memory to it
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
we keep struct memory_platform_data for now on we will switch off the memories
resources to struct resource
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
256k(barebox)ro,128k(bareboxenv),1536k(kernel),-(root)
so we will match the erase block size
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When the bus_width was set to 8, then only one data-line has been initialized.
Signed-off-by: Hubert Feurstein <h.feurstein@gmail.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MLO is to big (>40000) to save Space disable CONFIG_FS_RAMFS and
CONFIG_FS_DEVFS in defconfig
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If booting from NAND GPMC_IRQ_ENABLE is not cleared, causing crash if kernel
request the gpmc irq. gpmc_generic_init clears GPMC_IRQ_ENABLE
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Heavily based on original Juergen Beisert's code.
Signed-off-by: Alexey Galakhov <agalakhov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is useful to detect a barebox image and to be able
to copy only the image size if barebox is stored on
raw partitions which are bigger than the image.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix following warning:
arch/arm/boards/karo-tx25/lowlevel.c: In function 'board_init_lowlevel':
arch/arm/boards/karo-tx25/lowlevel.c:75:6: warning: unused variable 'i'
Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix following warning:
arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c: In function 'eukrea_cpuimx35_devices_init':
arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c:176:15: warning: unused variable 'tmp'
Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If OMAP4 fall back to MMC1 boot in bootmode 0x39 (NAND,USB,UART,MMC1)
NAND and MMC bit in TRACING_VECTOR3 are set. With changed order it will
detect boot from MMC.
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add some common xload helper functions to determine the boot source
on omap3/4 and to load images from mmc and nand.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On several boards without MMU support the vectors cannot be mapped
to 0x0 and exception support is nonfunctional anyway, so make this
configurable.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds BCH ecc support to the omap nand driver. The BCH
error correction allows for up to 8 bit error correction. It is
also needed for booting from nand on omap4.
This is based on code from Sukumar Ghorai <s-ghorai@ti.com>:
[PATCH] omap3: nand: bch ecc support added
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On omap we use different ecc modes for different purposes. The initial
boot code has to be written with hardware ecc whereas Linux usually uses
software ecc. To be able to write in both modes with a sinlge barebox
image introduce a eccmode device parameter.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If compiled without gpio support the linker will throw the
gpio functions away anyway, so make the omap kconfig entries
a bit easier.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Give this omap specific entry an omap namespace. Also, remove
unnecessary dependency to omap2/3 in nand Kconfig.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The original plan was to add all omap devices into the boards/omap
directory. Anyway, there will be reasons to put a board somewhere
else, so move the generic parts into the omap architecture directory.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current gpio support is derived from the kernel which allows
for support for omap2/3/4 in a single kernel. We do not need this
here, so make it more simple to be able to add omap4 support later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When booting from NAND, its important to know the correct page size. When
the NAND is used as the boot source, four dedicated pins are used to configure
the correct page size and address cycles. These pins can be read back in one
of the NFC registers to parametrize the load function.
This patch also extends the read routine to support more than four address
cycles on demand.
BTW: At least some mini2440s are misconfigured to use five address cycles for
a NAND device that is known to need only four address cycles. In this case the
vendor is at our side: This NAND simply ignores any additional address cycles
than required.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
before we can only support tftp
so keep it as default
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
256k(barebox)ro,128k(bareboxenv),1536k(kernel),-(root)
so we will match the erase block size
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Often enough the exception vectors are not on TEXT_BASE (for example
on i.MX SoCs in internal boot mode), so the board specific code did
not map the exception vectors to 0x0 but whatever happens to be on
TEXT_BASE. Also, the current section-only mapping requires the
exception vectors to be on a 1MB boundary.
Instead, create the possibility to create second level tables and
use this to map a copy of the exception vectors in a board
independent way.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The armv7 specific __mmu_cache_on function accidently sets
the page table pointer with the unitialized value of r3. It seems
that often enough r3 still held the correct value from a previous
call to mmu_init allowing this bug to remain uncovered for longer.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To prevent turning on the display before the signals are stable.
Also, put the LCD_CS pin in the same mode as the kernel does to
prevent flickering.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX Processors support two different boot modes, the internal
boot mode and the external boot mode. Traditionally the external
NAND boot mode is handled in drivers/mtd/nand and the internal
boot mode is handled in arch/arm/mach-imx. This patch consolidates
the handling of both boot modes in arch/arm/mach-imx so that
the user does not have to look in the mtd kconfig section for
booting from NAND. Also, selecting between internal and external
boot mode now is a clear choice.
The external NAND boot mode has been independent of the mtd nand
driver, but as the code was contained in the NAND driver it was
not possible to support booting from NAND without a mtd nand driver.
This is changed with this patch.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Also adapt the config file to the default environment.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With this patch barebox can now be booted from RAM, NOR and NAND on the
mini2440 platform. 'CONFIG_S3C24XX_NAND_BOOT' must still be 'y' to be able to
boot from NAND.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The default configuration of the mini2440 in the current 2.6.37 kernel uses
a flash based BBT. So, the barebox for the mini2440 must also use one, to be
in sync with the kernel about bad blocks in the flash.
Due to the used OOB layout, the generic BBT description coming with the
framework can be used.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without this modification saving a modified environment ends with:
mini2440:/ saveenv
saving environment
could not open /dev/env0: Read-only file system
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is required in order to enable booting from NAND, when there is no
other first level bootlader.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If the SDRAM type will change in the future, only the 'config.h' must be
adapted to the new settings. The real size will be read back from this setting.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is required in order to enable booting from NAND and to avoid any visible
garbage on the screen until the pins are really set.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is required in order to enable booting from NAND and using the generic
S3C2440 setup routines.
Two types of SDRAM devices are known to be shipped by FriendlyARM. This config
should work on both of them. But it is really tested only for the HY57V561620
type.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is required in order to enable booting from NAND and using the generic
S3C2440 setup routines.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The default configuration of the current 2.6.37 kernel uses a flash based BBT.
So, barebox must also use one, to be in sync with the kernel about bad blocks
in the flash.
Due to the used OOB layout, the generic BBT description coming with the
framework can be used.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There is no rule how to connect the SDRAMs to the two clocks signales the CPU
provides. Some boards are using them on a per bank base, some others on a per
chip base. So, the check for the enabled second clock cannot be used to detect
if the second SDRAM bank is populated.
A better way is to check the MT bits of the second SDRAM bank register. When
the init code sets these bits to '00' the second bank is not used for SDRAM
and gets ignored.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
At least partly. We have pads in barebox that we do
not have in the kernel. Also, this with this patch we
do not set the sion bit which the kernel does.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without this patch (against next) I get this:
rsc@thebe:barebox$ make ARCH=arm CROSS_COMPILE=<path>/arm-v5te-linux-gnueabi- menuconfig
HOSTCC scripts/kconfig/lxdialog/checklist.o
HOSTCC scripts/kconfig/lxdialog/inputbox.o
HOSTCC scripts/kconfig/lxdialog/menubox.o
HOSTCC scripts/kconfig/lxdialog/textbox.o
HOSTCC scripts/kconfig/lxdialog/util.o
HOSTCC scripts/kconfig/lxdialog/yesno.o
HOSTCC scripts/kconfig/mconf.o
HOSTLD scripts/kconfig/mconf
scripts/kconfig/mconf Kconfig
warning: (ARCH_IMX25 && ARCH_IMX27 && ARCH_IMX35 && ARCH_IMX51 && ARCH_IMX28) selects ARCH_HAS_FEC_IMX which has unmet direct dependencies (ARCH_IMX)
warning: (ARCH_IMX25 && ARCH_IMX27 && ARCH_IMX35 && ARCH_IMX51 && ARCH_IMX28) selects ARCH_HAS_FEC_IMX which has unmet direct dependencies (ARCH_IMX)
Add the option for the FEC on MX28 as well.
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
we use the board revision to specify to the linux kernel the type of lcd
we use. So we can have only one machine for those 3 boards:
- sam9m10-ekes (LG)
- sam9g45-ekes (LG)
- sam9m10g45-ek (Truly)
today we support 2 lcds model:
- LG philips LB043WQ1
- Truly TFT1N4633-E
by default we select the Truly as the sam9m10g45-ek is the most common board
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Video controller of STM allow to control the reset bit of an external
LCD controller. When reset_lcd is set, CTRL1_RESET bit is used to
enable and disable LCD.
Handle USE_LCD_RESET as a flag in imx_fb_platformdata.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When describing an new video interface, it is now possible to select
the bit per pixel. If nothing is chosen 16bpp is selected by default.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We never supported the sigmatel stm chips and probably
never will. So do the first step and rename the architecture
to mxs just like in the kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reverted upon request of Jean-Christophe. Not needed anymore since:
commit be4146161b
Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Date: Sun Jan 16 12:12:32 2011 +0100
import swab.h arch implementation form linux v2.3.37
this will avoid __bswapsi2 issue see with gcc 4.5.1
This reverts commit f68dc40804.
it's 0x73f00000 not 0x23f00000 as the other at91
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Saves the boot source into an environment variable so env scripts
can more easily use boot source information.
Note only tested on imx35. I haven't added support for any other variants
because I'm not familiar with them. (And can't test them anyway).
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Also, make sure that the usb ports are in ulpi mode before configuring
the iomuxer. Otherwise the ulpi transceiver cannot be initialized correctly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will avoid __bswapsi2 issue see with gcc 4.5.1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch removes the inclusion of libgcc functions into Barebox on the ARM
architecture. Only the really needed functions are provided in the lib_arm
directory. Those implementations are copied from Linux where they are well
proven related to reliably, performance.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
from linux kernel v2.6.37
This patch adds various C and assembler macros that help with using
the unified assembler syntax for compiling files to either ARM or
Thumb-2 modes.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
NAND_IMX_BOOT is related to the external boot mode, so do not
select it when using internal boot mode.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The idea is to panic() when there is no memory available for normal
operation. Exception: code which can consume arbitrary amount of RAM
(example: files allocated in ramfs) must report error instead of panic().
This patch also fixes code which didn't check for NULL from malloc() etc.
Usage: malloc(), memalign() return NULL when out of RAM.
xmalloc(), xmemalign() always return non-NULL or panic().
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch updates the clock dividers for the graphics
processor.
It is based on commit:
c4e1d9b718b65436e30422506f43fa4eb21069d3
at http://arago-project.org/git/projects/?p=u-boot-omap3.git
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In function get_osc_clk_speed(), the SYS_CLK divider
was being changed 'suddenly'.
This change has cascading effect on the derived clocks,
leading to inconsistent behavior - often a crash.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds the basic clock initizlization for OMAP36XX.
Portion of this patch is based on commit:
29587220909e639cda4fb5a35cb5bf33aba242b9
at http://arago-project.org/git/projects/?p=x-load-omap3.git
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch defines functions that contain steps to configure
DPLL for each clock domain.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds the DPLL tables for OMAP36XX and the
necessary functions to access these tables.
Both definitions follow the conventions used for
OMAP34XX.
All tables, currently, correspond to SYSCLK at 26MHz.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The PER domain dpll significantly differs from 34x.
This patch defines struct to collate related info.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds support to detect the different
OMAP36XX silicon revisions.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds the support to detect OMAP3630.
It also re-organizes the CPU_xxxx definitions in sys_info.h
to ascending order so that newer silicons can be added at
bottom.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This (re)enables boards to have multiple boot headers so that the one
image can be used for booting from multiple boot sources.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds suffix 34x to DPLL tables and related functions to
indicate that they are applicable to OMAP34XX only.
The suffix was required to prepare for support of OMAP36XX in the
subsequent patch series.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch updates the DPLL functions to return correct
DPLL table based on the cpu revision.
The DPLL table for PER domain is same across all revisions,
but the function signature has been updated to maintain
consistency in the API definition.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Content from monolith implementation in prcm_init() has been
moved into separate functions - per clock domain. This makes
code easy to adapt for silicon revisions and families.
Few cosmetic changes may have been done during this movement.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds DPLL tables for OMAP34xx ES1.0 and ES2.0.
When more than one table is added, the get_xxx_dpll_param()
was updated to use the tables corresponding to ES2.0 to
ensure that current functionality doesn't break.
In addition, the tables have been reformatted for better
readability.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch ensures that all silicon revisions
are detected. (Current implementation cannot
detect ES1.0).
In the process, the 'seemingly' hardcoded macros
identifying cpu revision (e.g. CPU_ES1P1) have
been updated to include the CPU name as well.
(The mapping of IDCODE value to silicon revision
may not be same across different OMAP families).
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch sets the cpu type based on the hawkeye value
read from the IDCODE register. So far, cpu type was
hardcoded.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds macros to extract the hawkeye
and version number from IDCODE value.
Updated function get_cpu_rev() to use new macro.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There is no really need for restricted variable types for the parameters.
Replace them by standard C types with the same behaviour.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In order to support video graphics output on i.MX23/i.MX28 based platforms,
a calculation routine for the pixel clock is required.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With the change to Hz as the main clock unit on the STM architecture the
Chumby must also use this unit.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This file is to be used in conjunction with the TX28 CPU module.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX28 comes with an extended ethernet controller (ENET/FEC) which
is backwards compatible to the FEC known from other i.MX CPUs. Add a few
adaptions to the existing driver to make it work with the MX28 FEC.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX28 shares a lot of functionality with its predecessor, the
i.MX23 (formerly known as stm378x). This patch adds some files to support
both CPUs.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
At least the FEC and the CAN controller drivers can also be used by the i.MX28.
When still used by IMX, the i.MX28 (and maybe i.MX23) related code must be
ignored.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Separate i.MX23 clock handling to simplify the addition of the upcoming i.MX28.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is for easier integration of the i.MX28 architecture (to share the code
later on).
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i.MX23 currently uses kHz as the unit for its clock handling and calculation
to avoid overflows when calculation with the internal 480 MHz PLL and its
fractional divider. This patch changes all routines to accept Hz and deliver
Hz as the clock unit.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
tested with qemu only
qemu-system-arm -M versatilepb -monitor null -kernel barebox -net nic -net user -tftp "<uImage-path>/" -serial stdio
add -nographic if you do not want the lcd via sdl
Signed-off-by: Alexey Zaytsev <alexey.zaytsev@gmail.com>
update:
- use default env
- move arm_timer.h as in the kernel
- add nor flash support
- udpate defconfig
- fix copyright copy from linux
- fix ARCH_TEXT_BASE
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Simplifies specifying gpio numbers from bank/number info.
From linux kernel.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MINI240 board has available always 64M of memory so add
size to memory device structure.
Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The patch introducing device macros for i.MX accidently registered a
imx-mmc device for i.MX25/35/51. It should be a imx-esdhc device. This
patch fixes tis
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fix following compilation warning:
../devices-imx31.h: In function 'imx31_add_fb':
../devices-imx31.h:34: warning: passing argument 2 of 'imx_add_ipufb'
from incompatible pointer type
Signed-off-by: Marek Belisko <marek.belisko@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Patch fix following compilation error:
../mini2440.c:33:28: error: asm/mach-types.h: No such file or directory
../mini2440.c: In function 'mini2440_devices_init':
../mini2440.c:113: error: 'MACH_TYPE_MINI2440' undeclared (first use in this function)
../mini2440.c:113: error: (Each undeclared identifier is reported only once
../mini2440.c:113: error: for each function it appears in.)
Signed-off-by: Marek Belisko <marek.belisko@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Here are the modification to at91sam9261 files dedicated to the support of
at91sam9g10. This direction has been adopted to minimize code duplication.
All at91sam9261 drivers are enabled in _devices and board files. Modificaton
to peripherals that support at91sam9g10 will be added in future patches.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Here are the at91 specific files dedicated to the at91sam9g45 series. They
mimic the traditional at91 way of managing chips & boards.
The first board that embeds at91sam9g45 chip is the AT91SAM9M10G45-EK. In
the future, we will add the m10 and other boards revisions
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
AT91sam9261 series is an ARM 926ej-s SOC family clocked at 190/100MHz.
The first board that embeds at91sam9261 chip is the AT91SAM9261-EK.
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
This work is mainly based on a9m2440 board implementation
from Juergen Beisert <jbe@pengutronix.de>. Functionality
was tested only running barebox from ram. Loading to flash
and booting will not work because missing lowlevel_init
functionality (lack of jtag debugger on my side ;)).
Signed-off-by: Marek Belisko <marek.belisko@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this patch fix the following warning :
arch/arm/boards/eukrea_cpuimx35/flash_header.c:30: warning: "DEST_BASE" redefined
arch/arm/mach-imx/include/mach/imx-flash-header.h:29: note: this is the location of the previous definition
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Silence this warning:
arch/arm/mach-omap/arch-omap.dox:51: Warning: explicit link request to 'define' could not be resolved
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
include/common.h declares this as "unsigned long addr", so we unify it.
This also silences a doxygen warning.
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Marc Kleine-Budde
Roman Fietze
Jean-Christophe PLAGNIOL-VILLARD
Teresa Gámez
Juergen Kilb
Sanjeev Premi
Wolfram Sang
Eric Bénard
Juergen Beisert
Enrico Scholz
Alexander Aring
Robert Jarzmik
Daniel Mack
Christian Hemp
Michael Grzeschik
Robert Jarzmik
Jaccon Bastiaansen
Fabio Estevam
Loïc Minier
Antony Pavlov
Thomas Petazzoni
Alexander Shiyan
Robert Schwebel
Hubert Feurstein
Paul Fertser
Jan Weitzel
Alexey Galakhov
Marek Belisko
Thomas Mayer
Juergen Beisert
Robert Schwebel
Gregory CLEMENT
Marc Reilly
Krzysztof Halasa
Alexey Zaytsev
Marek Belisko