When an oftree is already specified use it. This lets the user
boot a kernel with an oftree he provided himself rather than
hardcoding the concatenated one.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add barebox-data section in arm branch to get complete
barebox regions in sdram regions tree.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The end of SDRAM is at 0x9fffffff, not at 0x8fffffff. This fixes starting
barebox when it is located in the second SDRAM bank.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
PAGE_ALIGN macro is needed to align addresses to page boundaries.
Move this macro to another PAGE_* defines.
Commands which uses remap_range function needs this macro.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Change function remap_range in arm architecture to make it
global accessable. For example command 'memtest' can change
pte flags to enable or disable cache.
Add dummy function for others architectures that doesn't
have mmu or pte support.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On the MX27 based board phycard-i.MX27 the display won't properly
come up.
Before removing imx-regs.h and the code that sets the register
in the i.MX video driver, the PCCR registers were set _after_
the screen start (LSSAR) was set.
This restores that old behaviour and makes the display come up
properly again.
I did not have a chance to test this on any other i.MX27 or i.MX21
hardware though I assume that the "old" order is required there
too.
Signed-off-by: Daniel Mierswa <d.mierswa@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Also put those names solely in the .c file as it's done with
the i.MX27 code.
Signed-off-by: Daniel Mierswa <d.mierswa@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arch/arm/mach-at91/at91sam9g45_devices.c: In function 'at91_add_device_i2c':
arch/arm/mach-at91/at91sam9g45_devices.c:158:42: error: 'pdata_i2c' undeclared (first use in this function)
arch/arm/mach-at91/at91sam9g45_devices.c:158:42: note: each undeclared identifier is reported only once for each function it appears in
arch/arm/mach-at91/at91sam9g45_devices.c:163:8: error: expected ':' or '...' before ';' token
arch/arm/mach-at91/at91sam9g45_devices.c:166:8: error: expected ':' or '...' before ';' token
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
We now have gpio_request. When we call gpio_direction_output before
registering a led_gpio the gpio will be implicitely requested by the
gpio core. gpio_request in the led core will then fail resulting in
an unregistered LED.
Fix this by removing the call to gpio_direction_output. The LED core
will do this anyway.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a function to register the cpws device and another one
to register the MAC addresses provided by the am33xx.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With bootm of_fix_tree() will already be called from the generic bootm
code, so do not do this again in the Android image handler.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Currently the bootm code uses of_fix_tree to apply the fixups
to the devicetree given on the command line. This function assumes
that there is enough space for the fixups available. Also on ARM
we have to make sure the tree does not cross 1Mib boundaries.
This patch moves the space allocation and alignment ensurance
to of_get_fixed_tree and uses it in bootm. This is the first
step for making of_get_fixed_tree the single point of devicetree
handling in barebox.
of_get_fixed_tree now takes an argument of the input fdt. If it is
given, this one is used, otherwise an internal oftree is used which
will be created in subsequent patches.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The am33xx hsmmc controller is actually a omap4 type controller which
means that it has a 0x100 offset in the registers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Only the OMAP4 has a register offset of 0x100 in the register space. Fix
this by using the device id mechanism. This became broken when the device
register convenience functions were introduced.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This will allow to dump all pin configuration in a nice table
and if the bank/pin is specified the pin details
barebox@Atmel at91sam9x5-ek:/
Pin PIOA PIOB PIOC PIOD
0: [gpio] set [periph A] [gpio] set [periph A]
1: [periph A] [periph A] [gpio] set [periph A]
2: [gpio] set [periph A] [gpio] set [periph A]
3: [gpio] set [periph A] [gpio] set [periph A]
4: [gpio] set [periph A] [gpio] set [gpio] clear
5: [gpio] set [periph A] [gpio] set [gpio] set
6: [gpio] set [periph A] [gpio] set [periph A]
7: [gpio] set [periph A] [gpio] set [periph A]
8: [gpio] set [gpio] set [gpio] set [periph A]
9: [periph A] [periph A] [gpio] set [periph A]
10: [periph A] [periph A] [gpio] set [periph A]
11: [periph A] [gpio] set [gpio] set [periph A]
12: [periph A] [gpio] set [gpio] set [periph A]
13: [periph A] [gpio] clear [gpio] set [periph A]
14: [gpio] set [gpio] clear [gpio] set [gpio] set
15: [periph A] [gpio] set [gpio] set [gpio] set
16: [periph A] [gpio] set [gpio] clear [periph A]
17: [periph A] [gpio] set [gpio] set [periph A]
18: [periph A] [gpio] set [gpio] set [periph A]
19: [periph A] [periph A] [gpio] set [gpio] set
20: [periph A] [periph A] [gpio] clear [gpio] set
21: [gpio] set [periph A] [gpio] clear [gpio] clear
22: [gpio] set [periph A] [gpio] set [periph A]
23: [gpio] set [periph A] [gpio] set [periph A]
24: [gpio] set [periph A] [gpio] set [periph A]
25: [gpio] set [periph A] [gpio] set [periph A]
26: [gpio] set [periph A] [gpio] set [periph A]
27: [gpio] clear [periph A] [gpio] set [periph A]
28: [gpio] set [periph A] [gpio] clear [periph A]
29: [gpio] set [periph A] [gpio] set [periph A]
30: [gpio] set [periph A] [gpio] set [periph A]
31: [gpio] set [periph A] [gpio] set [periph A]
barebox@Atmel at91sam9x5-ek:/
pioA27 configuration
[gpio] clear
multidrive = disable
pullup = disable
degitch = disable
debounce = disable
pulldown = enable
schmitt trigger = enable
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
to select the smc and timer for at91sam9 soc
This will allow to simplify the Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This will allow to support multiple arch
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
and then register a device
The code is take from linux
drop AT91_BASE_SYS for dbgu
factorise the soc type in the Kconfig but keep the ARCH_ so far
as the device code have the same function accross soc which for now does not
allow us to compile soc together
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
add non AT91_SYS_BASE offset base address define
This will prepare for multi arch support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we can drop AT91_BASE_SYS too
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as d1 pioB18 is used for the one wire too
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
imported from the kernel
this allow to simplify the mux implemtation and will simplify the gpio support
from bare_init or pbl
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this is the first step to prepare the switch to the gpiolib
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so 0 is a valid gpio as cleanned in the kernel
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
switch gpio type from u8 to int in the data struct
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MC34708 depend on I2C or SPI, so let driver depend on SPI too
and rename config option name to MFD_MC34708.
Signed-off-by: Wjatscheslaw Stoljarski <wjatscheslaw.stoljarski@kiwigrid.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Created ARCH for AM33xx boards as second stage bootloader.
This includes:
- Added dmtimer0
- Created basic header files
- Added MMC support for ARCH_AM33XX
- Added reset function
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Some header file cleanup by:
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The hsmmc module has a 0x100 offset in its register space. The real
register space size for the module is 4K, so when we register the
device with the size 4k, we have to account for the offset in the
driver, not in the resource allocation.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- remove mach/silicon.h and include omap?-silicon.h directly
- include mach/omap?-clock.h directly where needed
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARCH_OMAP2 missing in barebox.
ARCH_OMAP3 and ARCH_OMAP4 is only choice for this target.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Efika MX Smartbook is a i.MX51 based netbook. This patch adds
nearly full support for it including:
- USB
- SD card slots
- Internal SPI NOR flash
- Internal flash PATA drive
- LEDs
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The board variant found on the AT24 EEPROM holds the variant ID that we
can use to identify which expansion board we are running on and thus
which device tree to load and pass to the kernel.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The AT24 found on the expansion boards store the variant of the board it
is soldered onto.
That means that we are that way able to determine what expansion board
is currently plugged in if any. If we can't communicate with the EEPROM,
we just assume that only the CFA-10036 is there.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This EEPROM is found on the expansion boards available for the 10036
module. Since we won't need to do anything fancy except reading/writing
from it, use bitbanging to communicate with it.
This EEPROM will hold mostly the board_id so that we can determine if
there is an expansion board plugged in and what expansion board it is.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ULPI lines are normally input to the USB port. In order to configure
the ULPI transceiver properly the ongoing transfers must be stopped. This
can be done by configuring the the STP pin as gpio output and drinving
it high.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Register the USB misc devices and provide convenience wrappers to
register the USB ports for i.MX27.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The smsc911x has a bootstrap pin for detecting an external phy.
Unfortunately this is pulled into the wrong direction on the pcm037
board, so force internal phy with platform data.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX27/31 have the second chip select enabled by reset default.
This can be considered as a hardware bug, because even boards which
need this settings cannot work out of reset because of the missing
initialization sequence. Detect this reset default setting and disable
this chipselect then to be able to properly detect the SDRAM size.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
omap3 has a soc specific reset function, make sure it calls common_reset
so that the proper CPU flags are set.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We allow unaligned accesses on ARMv6 onwards, make sure the CR_A
flag is cleared so that unaligned accesses do not trap.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Barebox not contain symbol HAVE_MMU, so remove all references to it.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Barebox not contain symbol HAS_CFI, so remove all references to it.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides a global cleanup barebox Kconfig files. This includes
replacing spaces to tabs, formatting in accordance format, removing
extraneous lines and spaces. No functional changes.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The fec has multiple clock inputs:
- 50MHz clock for generating the (R)MII clock
- bus clock
The MDIO clock is derived from the bus clock, not the 50MHz clock,
so pass this into the driver so that it can correctly configure
the MDIO clock divider.
This fixes several wrong MDIO register read problems on i.MX28 boards.
Reported-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for the Garz+Fricke Vincell board. This has
a i.MX53 Processor with 512MB of DDR3 RAM.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for initializing DDR3 RAMs on the i.MX53 type
SDRAM controller. The code automatically detects size/layout of
the connected RAM, detects the bus width and which chipselects are
populated.
While I believe this code is not 100% generic, it is far too
sophisticated to stay in a single board directory. I'm sure
other boards could make use of this aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pll setup function is exported, so it makes sense to export
the convenience wrappers for specific frequencies aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some boards do not have a DCD table since they initialize everything
in code, so allow to skip it and leave the corresponding pointers
empty.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The code initializing the SDRAM controller is not at the same
place where SDRAM is registered with barebox. To reduce the
risk of registering wrong SDRAM sizes this patch adds a
driver for the ESDCTL which reads back the configured SDRAM
size and registers the memory found with barebox.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In recent reference manuals the plls were renumbered. PLL8 now is
PLL6 and vice versa. Change the code according to the reference
manual to avoid confusion.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ethernet PLL has a fixed frequency of 500MHz. What is adjustable
are additional dividers which we better describe separately.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add and use meaningful macro names for OMAP4 GPIO addresses, and add a
comment to explain the 0x100 offset for OMAP4.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In addition, collapse adjacent comment blocks into one and remove
extraneous blank lines.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds lowlevel debug functions for i.MX. As we have a great variety
of different UARTs on i.MX currently no Kconfig support for chosing the
correct one is added. Instead we expect the user to add the correct
define and issue a compiler warning if he hasn't.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
putc already is a regular barebox function. To avoid conflicts and
confusions just let architectures define PUTC_LL directly instead
of going through this addiotional redirection.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Pinmuxing was wrong and no GPMI device was created.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
structure is used within barebox only and there is no need to pack it.
As this option has a negative performance impact, remove it.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Pass the buffer size to the file detection code. This makes sure we do not
read past the buffer. This is especially useful for ext filesystem detection
as the magic is at byte offset 1080. Also introduce a FILE_TYPE_SAFE_BUFSIZE
define which is set to the minimum bufsize the detection code needs to detect
all known filetypes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
today the timer rate is hardcoded to 6MHz which is wrong the PIT rate is MCK / 16
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we now create the cdev via mtd
This will also simplify sync with linux
to avoid the m25p8000 or m25p00 the cdev is still named name m25p and the
drivers m25p80
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since commit dc9d70e2 the define CCM_PDR4 is called MX35_CCM_PDR4.
sha: Added the same for cupid
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Update help info, it's slightly out of date, and a grammatical fix.
No functional change.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch sets HPM (Host power mask bit) to bit 16 according to i.MX
Reference Manual. Falsely it was set to bit 8, but this controls pull-up
Impedance.
Reported-by: Michael Burkey <mdburkey@gmail.com>
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as in the kernel use is_rmii
flags for pinctrl
phy_flags for phylib flags
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There is no need to add the command name to the "usage" info when
defining a command.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as the support atmel mci drivers does not work on rm9200 and we have the
possibility to use it as spi use it
Originally on rm9200 when the interface mci is in SPI mode we use a DataFlash Card
so allow it but if no dataflash card option is enable use as mmc spi.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
on the 9g20 low power version we have a mmc spi as microSD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
on the 9g20 low power version we have a mmc spi as microSD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
on all the cpu module we have a at25 except on the cogent where we have a at45
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio as the hw ip is broken
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio as the hw ip is broken
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio as the hw ip is broken
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio as the hw ip is broken
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio as the hw ip is broken
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use i2c-gpio until we add the hw drivers
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The OUI will be 'tml' => 76:6D:6C
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The modules from cogent use a 1.8V nand
And have the mci card detect broken as they use the flash vdd as vdd for the
cd which need > 2V
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
for bootp specify the module version via client_id as
%{BOARD}-%{VERISON}
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The OUI will be 'ron' => 72:6F:6E
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The OUI will be 'ron' => 72:6F:6E
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The OUI will be 'ron' => 72:6F:6E
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fixes a linker error when PBL_IMAGE=n and DO_LOW_LEVEL_INIT=n.
In this configuration the symbol reset() was present multiple times,
and prevented the barebox image to be linked.
Signed-off-by: Christian Kapeller <christian.kapeller@cmotion.eu>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch remove a superfluous DCD command in TX53-xx30 flash header.
The entry DCD_WR_CMD(0x21c) just duplicates the contents of the last
imx_flash_header_v2 struct member dcd.
Removal of this DCD entry is needed to make the TX53 board boot again
from NAND.
Signed-off-by: Christian Kapeller <christian.kapeller@cmotion.eu>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
the phy reset neet to be done before the fec driver is registered
as we accesst the phy at the fec probe time
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
the rm9200 have a errata the cs0 must be used via hw cs not gpio
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Switch to new environment and add the bootscripts needed for mmc. Also,
update defconfig for new environment.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Needed so that the linker can throw it away when unused. This is needed
at least on current master for being able to enable pbl support for omap3
boards.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds generic board support (CLEP7212, Linux ARM ID=91)
for CLPS711X-target.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a simple serial driver for CLPS711X architecture.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds new architecture (CLPS711X) into barebox.
The core-logic functionality of the device is built around an ARM720T
processor running at clock speeds up to 90 MHz.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The idea of having /env/init/* scripts was to make the configuration
more flexible and customizable for boards. It turned out though that
people (including myself) do not find the place where they should
change these settings.
So this patch brings back /env/config for defenv-2. The individual
env/init/* scripts are removed and their content is added to
/env/init/config-board. This makes the values from /env/init/config-board
the board specific defaults which can be overwritten in /env/config.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The added complexity of bootargs-ip-* and bootargs-root-* makes
understanding defenv-2 more complicated. remove them and open
code the scripts instead in their users.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The same issue was fixed in the Linux kernel in commit
66ddfc6 (mx35: add a missing comma in a pad definition)
for 2.6.33-rc7.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
barebox size is 384KiB
and for the official atmel release we need to rootfs at 8M
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Took the mx28evk defconfig, activated DMA and NAND, used savedefconfig;
this patch is the result.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
While flash layout may be custom, at least the nand0-device is good to
have.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These routines can fail, add support for that. Also, put in missing
copyright headers.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
now we can flash barebox by itself as the bootstrap need to use pmecc
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch is from linux 3.7-rc1 and adapt to Barebox
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We support two different board revisions, both of which only differ
in the dcd table, so we can support both in a single binary with the
cost of storing both dcd tables in the binary.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for an update handler for internal boot. Currently
handled are:
- v1 MMC/SD
- v2 MMC/SD
- v2 NAND
where v1 is found on i.MX25, i.MX35 and i.MX51. v2 is found on i.MX53.
This code intentionally does not use the DCD data compiled into every
i.MX internal boot image. This makes it possible to make a pure second
stage barebox bootable on i.MX internal boot devices later.
This has been tested on the i.MX51 babbage, i.MX53 loco and i.MX53 tx53
board.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The KARO Tx53 board in the revision 8030 has an instable SDRAM
setup. It works as long as the MMU is disabled, but the board
crashes at arbitrary places once the MMU gets enabled. So we
need the PLL setup early. Enable it for pbl.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This redefines the sdram controller registers as offsets to the base
rather than as absolute addresses. All users are fixed to use the
SoC specific base address.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We now have request_sdram_region to request a region. Use
it instead of a comparison with MALLOC_BASE.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This was once disabled because we had no board support. This has
changed, so enable the S5P board support in the config so that
the friendlyarm_tiny210_defconfig actually builds for the correct
machine.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
board_init_lowlevel is no longer called from generic code, so we can't
just return from in. Instead we have to jump to board_init_lowlevel_return
manually. For the a9m2440 board one case was missed to convert. This
is broken since:
| commit faf7b7af6e
| Author: Jan Luebbe <jlu@pengutronix.de>
| Date: Mon Sep 24 10:18:34 2012 +0200
|
| ARM: give boards control of the reset entry point
|
| On some SoCs (for example AM35xx), the ROM bootloader passes useful
| information in r0 when jumping to barebox.
|
| To avoid overwriting this in the generic reset code, we introduce
| common_reset as a C function and as an assembler macro. This is then
| called form the reset entry point (either in common or in board code).
|
| This patch is based on code by Sascha Hauer <s.hauer@pengutronix.de>.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Rather than doing this in the SoC specific code just print
it in imx_set_silicon_revision. This saves some lines of code
and also results in i.MX27 now also having the silicon revision
printed during startup.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This moves the known i.MX bootsource settings to a single file
so that the code can be shared. Also we add a enum for the different
boot sources so that it can be used in C Code and not only on the shell.
The pcm038 board is changed to use it instead of digging in the registers
manually.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The different ARM architectures need different cache functions. This
patch makes them selectable during runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without MMU enabled we do not need to call __mmu_cache_* as the
caches are not enabled. Calling flush_icache() before jumping
to new code is enough.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The exception handlers need some space to write to. Traditionally
this has been some stack space. This is not necessary at all, so
just use some variable and get rid of the compile time fixed stack
address.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On i.MX we enable all necessary clocks during startup of the clock
controller driver, so we do not need the register hacking in the drivers
anymore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Once we run on multiple SoCs we must know which arm architecture we
are on. Add cpu_architecture() from the kernel to detect it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- increased the region size for OMAP3, as it was not correct
- decrease region size for OMAP4 to prevent overlapping.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As the gpio functions are not available at this point, set the gpio manually.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
start() for the PBL case is a duplicate of board_init_lowlevel_return().
Instead of duplicating it just call it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The at91sam9260ek has a custom reset function which does the same thing
as the default function. Also it does not define MACH_HAS_LOWLEVEL_INIT
as it should do. Remove the function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- for i.MX1 the register is in the System Control unit, so move
the code to arch/arm/mach-imx/imx1.c
- for the other i.MX the register is in the watchdog unit, so move
the code to drivers/watchdog/imxwd.c
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
of_alias_get_id() returns the number of the gpio bank, so we have
to multiply with 32 to get the gpio base.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- Add a separate header file for the iomux-v1 just like done for
iomux-v3.
- initialize iomux from SoC code so that we do not depend on IMX_GPIO_BASE
anymore.
- define registers as offset to the base rather than absolute addresses
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All i.MX SoCs now use the same imx_silicon_revision() function to get
the revision. Add a separate header file for it and a common function
used on all SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sometimes Assembler beats C. In this case a small assembler
function called without parameters can:
- copy a binary to its link address
- clear the bss
- return to the same position in the copied binary
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
update gpiolib to select GENERIC_GPIO and provice a generic header
use is on versatilepb
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJQbomXAAoJEOrjwV5ZMRf2zcgP/i/42+i1Yz7EUfD/prR2tJnQ
jstZyXbCWBXMxwDewWAS0EKNnAO2a2fg8HuB/MpElKJSiEj6bs+7QQtZbXPeQ6M8
bbtzIgkueyc38v2NXN/CRZjo2LMs6OV93iOQw0m0RX2/ysistG21Qm6LZPycGlwa
iAX9aiOBEtbgeK8aVXRDq8FvGAlF9QUUSi6rkszNCVQd2eqZUghSutVT48MfbSNb
TKGgEGJ4c2qws4ZBP/5u/C95HFiaRu+3z7JM+NgAtYwMa69TcntQg48eMv9iDV0U
KccSIb31vfKDkyvBdvnTp+nCt9lM/O8uOFMGujQa2sFbdzEyiaRVQ3UutZfkj44y
xuRHmXpi1BG44p22j/q/VBqLpPL2Cv4mUFEMCS6psBE1tP72iF6wWpXe9XjToHKR
f5sMe+/PePLYdwLFzdcUruxch6IKjCXDFBtc7gGcfxPVnrlupT1KQJxla8kXuptG
2ZMepbEG+lrQPRRMv59UUVL00105EeV6tb7bf8/XjPDLO1cPnAXSkH9LbV/JTond
slUKE1Yphgqfu1+i4OO7IN3fy487ptK4l0bdQBM5XH2Dva4BuMn3CL2Cqikk0QLM
2DplGewJZB8N5OMJ+mOIsHST/3Wj1LqOh3unFy4pi6Gi2sIXVHJSgLiVPVP1rip+
uUKrizypCdrO5qi+j2u8
=6Xdm
-----END PGP SIGNATURE-----
Merge tag 'gpio_arm' of git://git.jcrosoft.org/barebox into for-next/gpio
add gpio primcell pl061 support
update gpiolib to select GENERIC_GPIO and provice a generic header
use is on versatilepb
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This adds the device id mechanism to the i.MX fec driver and
uses it to determine the fec version. Also adds devicetree
probing support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We called create_sections with 4096MB as size argument, but create_sections
expected the argument in bytes, so create sections was completely optimized
away due to the size >>= 20. This patch changes the size argument to be in
megabytes and adjusts map_cachable to pass the argument in megabytes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We can't do anything useful in the error function, so we just hang.
This has the advantage that at least when a JTAG debugger is connected
we can see what happens. Otherwise the code just jumps to NULL in case
of an error.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since we have phylib the phy won't be detected after poweron. It seems
the phy needs some time after reset.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- The i.MX1 timer does not have IPG clock as source, so rename
the define accordingly
- for the i.MX31 timer we want to use the per clock, not the ipg
clock.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The old clock support is now unused. Remove it. The former i.MX clko
command is superseeded by generic clock manipulation commands.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
remap_cache currently does not work, so enabling the MMU in the
PBL currently does not make sense. Disable it for now.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This way you can specify as previously set the dhcp parameter via global.dhcp.xxx
and get the result via global.dhcp.xxx
This is need for the defaultenv-2 to add the bootp suppport.
Use it on defaultenv too to have only one set of var.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The following missed to add a jump to board_init_lowlevel_return for the
phycard pca100 board:
| commit 244198ea8b
| Author: Sascha Hauer <s.hauer@pengutronix.de>
| Date: Sun Jul 8 18:30:42 2012 +0200
|
| ARM boards: Use _text rather than TEXT_BASE
|
| With compressed image support TEXT_BASE will become the base
| address of the uncompressed image. What the boards want instead
| is the base address of the decompressor code or, if not compressed,
| the base address of the uncompressed image. Use _text which is
| the correct one for both cases.
|
| Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This fixes it by adding the jump. Also imx_nand_load_image is directly
called from lowlevel_init.S which fixes compilation with pbl support
enabled.
Tested with both compression enabled and disabled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Booting from SPI on an AM35xx (and possibly other TI SOCs) requires
a special format:
- 32 bit image size in big-endian
- 32 bit load address in big-endian
- binary image converted from little- to big-endian
The mk-am35xx-spi-image tool converts barebox.bin to
this format.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The cfa10036 board file were missing the length parameter when adding
devices. This made barebox crash early in the boot, in the mxs-mci
driver.
Provide the resources lengths in a consistent format.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On some SoCs (for example AM35xx), the ROM bootloader passes useful
information in r0 when jumping to barebox.
To avoid overwriting this in the generic reset code, we introduce
common_reset as a C function and as an assembler macro. This is then
called form the reset entry point (either in common or in board code).
This patch is based on code by Sascha Hauer <s.hauer@pengutronix.de>.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is unused now and not needed. We have a board_init_lowlevel. If a
board needs some architecture setup it can always call it from its
board_init_lowlevel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
OMAP3 is the only architecture which has a arch_init_lowlevel in
which it invalidates the dcache. This can easily be done in
board_init_lowlevel aswell. Since on OMAP3 we are always executed
in SRAM we'll never need a board specific lowlevel_init. So the
easiest way of getting rid of this special handling is to just
rename the function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is unused now and not needed. We have a board_init_lowlevel. If a
board needs some architecture setup it can always call it from its
board_init_lowlevel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
OMAP3 is the only architecture which has a arch_init_lowlevel in
which it invalidates the dcache. This can easily be done in
board_init_lowlevel aswell. Since on OMAP3 we are always executed
in SRAM we'll never need a board specific lowlevel_init. So the
easiest way of getting rid of this special handling is to just
rename the function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adapt phylib from linux
switch all the driver to it
reimplement mii bus
This will allow to have
- phy drivers
- to only connect the phy at then opening of the device
- if the phy is not ready or not up fail on open
Same behaviour as in linux and will allow to share code and simplify porting.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
To get rid of the register definitions in the SoC header files.
platform_device_id is used to distinguish between gpt types.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When the i.MX28 boots from USB, the ROM code sets this bit. When
after a reset the ROM code detects that this bit is set it will
boot from USB again. This means that if we boot once from USB the
chip will continue to boot from USB until the next power cycle.
To prevent this (and boot from the configured bootsource instead)
clear this bit here. This bit is not documented in the datasheets,
it was figured out the hard way. Whether this is the same on i.MX23
is currently not known.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This fixes the following warnings:
arch/arm/boards/freescale-mx6-sabrelite/board.c: In function 'sabrelite_ehci_init':
arch/arm/boards/freescale-mx6-sabrelite/board.c:265:2: warning: implicit declaration of function 'imx6_usb_phy1_disable_oc' [-Wimplicit-function-declaration]
arch/arm/boards/freescale-mx6-sabrelite/board.c:266:2: warning: implicit declaration of function 'imx6_usb_phy1_enable' [-Wimplicit-function-declaration]
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use 512k NAND Partion for barebox in enviroment and boards code
pcm049: use 4MB for kernel
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As we may try to get it from the env.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so be can add more format support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allow to detect the amba device and use the right driver for it at
runtime.
With pl011 amba support (ARM & ST Variant)
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJQTsKnAAoJEOrjwV5ZMRf2tT8P/RbBxsL1JzhtTPF87JELTe4f
BA5T/PNuJUwPFuzJDmV50RYjl7yGJzXZfRChV6SayAacKTv7AjF7jT21ezrdxblF
D0+i1+pyR1DCq1T2WG5EtoJVWbz8ud1o+maOcj25+F+RGbjV/5olsYw29prjVNrW
cxD3jBHmcatJN5D++/o8HD9uqSMsjV36Sqnm05fAmTpoWu71BJX1mfeorpWuIimu
6R7iT3dXTt7/y4DtYZmZmY6mUz4i/2goQ580HWq4FKTc/825q5cqZptHRQtn2MWu
NLPhsc6hB6BW2w3lV3VywMlllTxAb1miWC4maJEkvwlyGgGPLTnyVaLj/KBNX9dy
CTsnBvWAoBT0Xxay2ca6NYaObG7S9u2BWjoNpkVWebqemGHqgjoFPHEhW+H/Tlgj
p+YrvwSGToKT7infFxhIS4wibHxATcIoNBzddfo04vYO4+nDz27jG4nFlU1DFmX+
fUCHsUUXlvfPfZN76pgcV1PJFEwS2A2BRDr57a2F75mkB+Ke/djJXimEFvrd+wxe
xzCohGKHzxl8nZuhYsbdqe0DrroPk6cV8nuTamCMwHa/BURka1Cj04GiIX/ZeguK
vDxMomsXA9OEmklvQv1VlpA1ltr40uZFtGxkbiJBv0k9YMntQsS1L28eeEdRxJrn
pEXlvw+8ZuO/Y0PMoTPo
=m4nO
-----END PGP SIGNATURE-----
Merge tag 'amba_bus' of git://git.jcrosoft.org/barebox into for-next/amba
arm: Introduce ARM AMBA bus
This allow to detect the amba device and use the right driver for it at
runtime.
With pl011 amba support (ARM & ST Variant)
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
For some reason, the mxs-boards missed some length parameters when adding
devices. This made reading from ocotp crash in the current version.
Provide missing lengths, use a consistent format and fix the length for
the LCDIF.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
imx23-olinuxino is a board designed by Olimex.
It has the following features:
- Freescale iMX233 ARM926J processor at 454MHz
-64 MB RAM
-SD-card connector
-TV PAL/NTSC video output
-2 USB High Speed Hosts
-Ethernet 100 Mbit
-Stereo Audio Input
-Stereo Headphones Audio Output
More information at:
http://www.olimex.com/dev/imx233-olinuxino-maxi.html
Signed-off-by: Fadil Berisha <f.koliqi@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current approach to get the offset between link and runtime address
is fragile. It requires a big fat comment to put no code above it and it
requires an extra linker section. Instead use a small assembler function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This function returns the offset between the address barebox is linked at
and the address barebox is currently running at.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add functions to read the barebox_arm_head, check barebox magicword
and read out the barebox image size.
Create a inital partion of 1Mb to access the barebox image on nand.
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
in commit 2bdc9f57a8 the iomux was synced
with the kernel but this leads to some changes in the PAD_CTRL of some
FEC pins leading to a non working FEC on our cpuimx51 board.
This patch set back the PAD_CTRL of the missing pins to the initial
value.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When building a special image from the original (compressed or
not) binary, to not overwrite KBUILD_BINARY.
This allows producing multiple images (such as MLO, UBL, ...)
from the (z)barebox.bin. In the case where no special image is
used, KBUILD_IMAGE is set to KBUILD_BINARY.
This patch was developed together with Sascha Hauer. Thanks!
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we are smaller than the 256KiB reserved for barebox
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we are smaller than the 256KiB reserved for barebox
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Alexander Aring
Daniel Mierswa
Vicente Bergas
Jean-Christophe PLAGNIOL-VILLARD
Jan Luebbe
Wjatscheslaw Stoljarski (Slawa)
Teresa Gámez
Alexander Shiyan
Maxime Ripard
Wolfram Sang
Antony Pavlov
Fabio Porcedda
Robert P. J. Day
Christian Kapeller
Enrico Scholz
Christian Hemp
Christoph Fritz
Uwe Kleine-König
Carlo Caione
Steffen Trumtrar
Jan Weitzel
Fadil Berisha
Eric Bénard